High performance random access memory with multiple local I/O li

Details High performance random access memory with multiple local I/O li High performance random access memory with multiple local I/O li

1999-07-28

2000-10-24

Nelms, David

Static information storage and retrieval

Addressing

Plural blocks or banks

365194, G11C 800

Patent

active

061377465

ABSTRACT:
The present invention provides an apparatus and a method of reducing the time to drive the I/O lines by the sense amplifiers. In one embodiment of the present invention, local sense amplifier segments and associated local I/O lines are provided. The I/O lines are short in length and are connected to the sense amplifiers in the associated sense amplifier segments. The reduction in the length of the local I/O lines reduce the effective RC impedance of the I/O lines. Thus, the local sense amplifiers are smaller and drive the local I/O lines much faster. The present invention further provides global I/O lines connected to the local I/O lines. In a second embodiment of the present invention, the global I/O lines are driven by a second stage amplifier. In a third embodiment of the present invention, one global I/O line is provided for every local I/O line.

REFERENCES:
patent: 5274595 (1993-12-01), Seok et al.
patent: 5617555 (1997-04-01), Patel et al.
patent: 5910927 (1999-06-01), Hamamoto et al.
patent: 5923605 (1999-07-01), Mueller et al.

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