High performance programmable interconnect

Static information storage and retrieval – Floating gate – Particular connection

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36518518, 36518521, G11C 700

Patent

active

058416943

ABSTRACT:
A high performance programmable interconnect enables scaled transistors to be utilized, in conjunction with memory cells, as transfer gates with improved speed characteristics. Boosted positive and negative drive voltages are supplied to the transfer gate depending on the programmed state of the memory cell. The transfer gate may be driven by an inverter using a transistor formed in a triple well.

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Peng, J.Z., et al., Impact of Tunnel Oxide Quality on Vt Disturb and Sort Yield of High Density Flash Memory FPGA Devices, Abstract for 1997 NVSMW (1997), p. 1-2.

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