High performance processor employing background memory move mech

Details High performance processor employing background memory move mech High performance processor employing background memory move mech

1997-08-18

1999-04-20

Lall, Parshotam S.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711137, G06F 938, G06F 1208

Patent

active

058965173

ABSTRACT:
The present invention which makes use of knowledge developed at the program writing stage by the programmer or by software tools such as a compiler that some substantial number of data accesses would miss in the cache hierarchy to the detriment of performance and that it would be possible to prefetch the necessary data in parallel with performing useful work. The invention provides a background memory move (BMM) mechanism by which the program can specify such prefetching of data from main memory to a quickly-accessible data cache and by which the program can determine which such prefetches have completed. This mechanism makes it possible to improve the performance of the computer system through the effective use of added concurrency while avoiding the overheads of process-swapping.

REFERENCES:
patent: 5353430 (1994-10-01), Lautzenheiser
patent: 5561783 (1996-10-01), Vanka et al.
patent: 5742814 (1998-04-01), Balasar et al.
patent: 5777629 (1998-07-01), Baldwin

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