High-performance pass-gate isolation circuitry

Details High-performance pass-gate isolation circuitry High-performance pass-gate isolation circuitry

1998-05-27

1999-12-07

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Including signal clamping

36518905, 36518911, G11C 700

Patent

active

059994592

ABSTRACT:
A pass gate isolation circuit (140) provides voltages to isolation pass gates (120) to allow higher speed access of rows in the memory array (105). When a read access of the array occurs, the pass gate isolation circuit generates a dynamic high voltage level at its output (315). The output becomes a steady state high voltage determined by a high voltage keeper circuit (320) and a voltage clamp circuit (325). When a write access of the array occurs, the pass gate isolation circuit generates an output level sufficient to permit addressing of the array and isolation of the row decoders (140).

REFERENCES:
patent: 4351034 (1982-09-01), Eaton, Jr. et al.
patent: 5301160 (1994-04-01), McAdams
patent: 5369317 (1994-11-01), Casper et al.
patent: 5682348 (1997-10-01), Lin et al.
patent: 5774406 (1998-06-01), Kowshik
patent: 5859797 (1999-01-01), Maccarrone et al.

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