High performance output buffer

Details High performance output buffer High performance output buffer

1998-11-24

2000-11-28

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326112, 326 23, H03K 190175, H03K 19094, H03K 19003

Patent

active

061540595

ABSTRACT:
An output buffer has internal circuitry connected between an input node and an output node. The internal circuitry includes a quiet voltage supply connected to a first set of transistors of the internal circuitry and a noisy voltage supply connected to a second set of transistors of the internal circuitry. The noisy voltage supply is at a voltage level higher than the quiet voltage supply. The first set of transistors and the second set of transistors provide isolation between the noisy voltage supply and the quiet voltage supply. The first set of transistors and the second set of transistors also provide complete digital high and low internal signal levels by using at least one transistor operative to supplement the complete shut-off and turn-on of transistors of the first set of transistors and the second set of transistors. The output buffer also features a ground bounce circuit, a slew rate control circuit, a transition accelerator circuit, a Personal Computer Interface (PCI) compatibility circuit, and a PCI control circuit.

REFERENCES:
patent: 4216390 (1980-08-01), Stewart
patent: 4506164 (1985-03-01), Higuchi
patent: 5583451 (1996-12-01), Sharpe-Geisler
patent: 5862390 (1999-01-01), Ranjan
patent: 5986489 (1999-11-01), Raza et al.

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