High-performance low-memory interleaver banks for turbo-codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...

Reexamination Certificate

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C714S756000

Reexamination Certificate

active

06857087

ABSTRACT:
An interleaver for interleaving a set of K ordered elements is disclosed herein. The disclosed interleaver can be expressed as a single permutation that corresponds to two local dithering operations and a global permutation operation. The single permutation can be represented as a small collection of short vectors, and can be calculated recursively, allowing the interleaver to be both stored and implemented using a smaller amount of memory than conventionally possible.

REFERENCES:
patent: 6339834 (2002-01-01), Crozier et al.
patent: 6637000 (2003-10-01), Rowitch et al.
patent: 6744744 (2004-06-01), Tong et al.
patent: 20020087923 (2002-07-01), Eroz et al.

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