High performance embedded semiconductor memory devices with mult

Details High performance embedded semiconductor memory devices with mult High performance embedded semiconductor memory devices with mult

1997-02-25

1998-10-20

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Data refresh

365149, 365150, 36523006, 365207, G11C 11406

Patent

active

058257047

ABSTRACT:
A dynamic random access memory solves long-existing tight pitch layout problems using a multiple-dimensional bit line structure. Improvement in decoder design further reduces total area of this memory. A novel memory access procedure provides the capability to make internal memory refresh completely invisible to external users. By use of such memory architecture, higher performance DRAM can be realized without degrading memory density. The requirements for system support are also simplified significantly.

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patent: 5220530 (1993-06-01), Itoh
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patent: 5282162 (1994-01-01), Ochii
patent: 5448513 (1995-09-01), Hu et al.
patent: 5526305 (1996-06-01), Levi

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