High performance dynamic multiplexers without clocked NFET

Details High performance dynamic multiplexers without clocked NFET High performance dynamic multiplexers without clocked NFET

1998-06-15

2000-07-11

Tokar, Michael

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Decoding

326105, 326 98, 326112, 327408, H03K 19084, H03K 19096, H03K 1762

Patent

active

06087855&

ABSTRACT:
Performance is increased within a dynamic multiplexer by removing the foot device and replacing it with a logic gate (such as an OR, NOR, or NAND gate) receiving the select signals and activating the precharge device within the dynamic multiplexer circuit. With such a configuration, crowbar current is still inhibited.

REFERENCES:
patent: 5093588 (1992-03-01), Ando et al.
patent: 5543731 (1996-08-01), Sigal et al.
patent: 5654660 (1997-08-01), Orgill et al.
patent: 5748012 (1998-05-01), Beakes et al.
patent: 5796270 (1998-08-01), Fifield et al.

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