High performance architecture with shared memory

Details High performance architecture with shared memory High performance architecture with shared memory

2002-04-26

2008-03-18

Sparks, Donald A (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S151000, C711S209000

Reexamination Certificate

active

07346746

ABSTRACT:
A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. A bank may be further divided into a plurality of blocks. A cache is provided to enable a processor to fetch from memory a plurality of data words from different memory banks to reduce memory latency caused by memory contention.

REFERENCES:
patent: 5261068 (1993-11-01), Gaskins et al.
patent: 5329629 (1994-07-01), Horst et al.
patent: 5412788 (1995-05-01), Collins et al.
patent: 5561784 (1996-10-01), Chen et al.
patent: 5848428 (1998-12-01), Collins
patent: 6272594 (2001-08-01), Gupta et al.
patent: 2003/0088744 (2003-05-01), Jain et al.

Affiliated with

Also associated with

Rating

High performance architecture with shared memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High performance architecture with shared memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High performance architecture with shared memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3978709