Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-06-26
2007-06-26
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
11159291
ABSTRACT:
A CDFG which is a graph representing calculations and a data flow included in the design specifications of a circuit is generated S101,a clock cycle required for the processing is obtained and thus an allocated resource connection graph is generated S102.When the allocated resource connection graph includes nodes to which hardware resources having the same function are allocated, a sharing edge for controlling sharing of the nodes is added between the nodes S103.A provisional layout of the allocated resource connection graph having the sharing edge added thereto is provided S104,and the nodes of the allocated resource connection graph are shared based on the layout result S105.The sharing edge is provided with attribute or weight such as attraction or repulsion. Thus, the distance between the nodes in the layout result is controlled and the degree at which the resources are shared is controlled.
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Hattori Dai
Kurokawa Keiichi
Ogawa Osamu
Toyonaga Masahiko
Do Thuan
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
Tat Binh
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