High-k/metal gate MOSFET with reduced parasitic capacitance

Details High-k/metal gate MOSFET with reduced parasitic capacitance High-k/metal gate MOSFET with reduced parasitic capacitance

2009-09-04

2010-10-12

Vu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S386000, C257S387000, C257SE21453, C438S183000, C438S926000

Reexamination Certificate

active

07812411

ABSTRACT:
The present invention provides a high-k gate dielectric/metal gate MOSFET that has a reduced parasitic capacitance. The inventive structure includes at least one metal oxide semiconductor field effect transistor (MOSFET)100located on a surface of a semiconductor substrate12. The least one MOSFET100includes a gate stack including, from bottom to top, a high-k gate dielectric28and a metal-containing gate conductor30. The metal-containing gate conductor30has gate corners31located at a base segment of the metal-containing gate conductor. Moreover, the metal-containing gate conductor30has vertically sidewalls102A and102B devoid of the high-k gate dielectric28except at the gate corners31. A gate dielectric18laterally abuts the high-k gate dielectric28present at the gate corners31and a gate spacer36laterally abuts the metal-containing gate conductor30. The gate spacer36is located upon an upper surface of both the gate dielectric18and the high-k gate dielectric that is present at the gate corners31.

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