High-K gate dielectric stack plasma treatment to adjust...

Details High-K gate dielectric stack plasma treatment to adjust... High-K gate dielectric stack plasma treatment to adjust...

2007-12-04

2007-12-04

Norton, Nadine G. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S714000, C438S710000, C438S585000, C438S734000, C438S627000

Reexamination Certificate

active

10677158

ABSTRACT:
A method for treating a gate structure comprising a high-K gate dielectric stack to improve electric performance characteristics including providing a gate dielectric layer stack including a binary oxide over a silicon substrate; forming a polysilicon layer over the gate dielectric layer stack; lithographically patterning and etching to form a gate structure; and, carrying out at least one plasma treatment of the gate structure comprising a plasma source gas selected from the group consisting of H2, N2, O2, and NH3.

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