Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2005-07-19
2005-07-19
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S216000, C438S261000, C438S287000
Reexamination Certificate
active
06919263
ABSTRACT:
A new relatively high-k gate dielectric gate material comprising calcium oxide will reduce leakage from the silicon substrate to the polysilicon gate, prevent boron penetration in p-channel devices, and reduce electron trapping in the dielectric. The surface of a silicon wafer is saturated with hydroxyl groups. A calcium halide, preferably calcium bromide, is heated to a temperature sufficient to achieve atomic layer deposition, and is transported to the silicon wafer. The calcium halide reacts with the hydroxyl groups. Water is added to carry away the resultant hydrogen halide. Gaseous calcium and water are then added to form a calcium oxide gate dielectric, until the desired thickness has been achieved. In an alternative embodiment of the method, the calcium halide is transported to the silicon wafer to react with the hydroxyl groups, followed by transport of gaseous water to the silicon wafer. These two steps are repeated until the desired thickness has been achieved.
REFERENCES:
patent: 3676756 (1972-07-01), Merrin
patent: 5937303 (1999-08-01), Gardner et al.
patent: 6020024 (2000-02-01), Maiti et al.
patent: 6137214 (2000-10-01), Raina
Aronowitz Sheldon
Sun Grace
Zubkov Vladimir
LSI Logic Corporation
Picardat Kevin M.
Trexler, Bushnell, Giangiorgi, Blackstone & Marr, LTD.
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