High integrated semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S296000, C257SE27084

Reexamination Certificate

active

07863684

ABSTRACT:
Disclosed herein is a semiconductor memory device including plural unit cells, each constituted with a floating body transistor without any capacitor, to prevent data distortion and data crash in the unit cell. A semiconductor memory device comprises plural active regions and a device isolation layer for separating each active region from each others, wherein the plural active regions stand in row and column lines.

REFERENCES:
patent: 7075152 (2006-07-01), Ohsawa
patent: 2005/0179073 (2005-08-01), Lee et al.
patent: 2006/0118849 (2006-06-01), Hidaka et al.
patent: 10-2002-0065353 (2002-08-01), None
Ranica et al., “A capacitor-less DRAM cell on 75nm gate length, 16nm thin Fully Depleted SOI device for high density embedded memories,” IEDM Technical Digest, Dec. 2004, pp. 277-280.

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