Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2001-10-05
2003-01-28
Whitehead, Jr., Carl (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
Reexamination Certificate
active
06512285
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is generally in the field of inductor fabrication. More specifically, the present invention is in the field of inductor fabrication on a package substrate of a semiconductor chip.
2. Background Art
The requirement of smaller, more complex, and faster devices operating at high frequencies, such as wireless communications devices and Bluetooth RF transceivers, has also resulted in an increased demand for small size inductors with high inductance. These small wireless communication devices and Bluetooth RF transceivers require small size inductors with high inductance for use in resonator circuits, filters, and switch regulators. For example, highly efficient switch regulators that need to work in the high KHz to low MHz range require inductors in a range of 100.0 nano henries (“nH”) to 10.0 micro henries (“&mgr;H”). Also, the highly efficient switch regulators require inductors to have an inductance value with a tolerance of +/−10%.
One attempt to satisfy the demand for the small size inductors with a high inductance discussed above has been to integrate the inductor on a substrate that houses a chip. Inductors with an inductance on the order of 1.0 to 3.0 nH, and even as high as 10.0 nH can be integrated on a substrate that houses a chip. However, inductors with an inductance in the range of 100.0 nano henries (“nH”) to 10.0 micro henries (“&mgr;H”) discussed above are too large to be integrated on a substrate that also houses a chip.
Another attempt to satisfy the demand for inductors with a small size and high inductance discussed above has been to use discrete inductors. However, discrete inductors suffer from various disadvantages not shared by inductors that are integrated on a substrate the houses a chip. For example, the discrete inductor requires the assembly of at least two components, i.e. the chip itself and the discrete inductor. The required assembly of two or more components introduces corresponding reliability issues and also results in a greater manufacturing cost.
Additionally, a discrete inductor typically has a fixed inductance that is not tunable or adjustable. Thus, a discrete inductor must have the specific inductance required in a particular circuit. If the value of the required inductance changes, the discrete inductor must be removed from the circuit and replaced with another discrete inductor having the new required inductance. For example, to obtain a specific resonance frequency in the development phase of a LC test circuit, the determination of exact value of the required inductance could require the removal and replacement of numerous discrete inductors before arriving at a discrete inductor with the required inductance.
Thus, there exists a need in the art for a structure for integrating an inductor on a package substrate of a chip that provides an inductor with a small size and an inductance in the range of 100.0 nH to 10.0 &mgr;H. Moreover, there exists a need in the art for a structure for integrating an inductor on a package substrate of a chip that allows the value of the inductance to be tuned to meet a specific requirement. Further, there exists a need in the art for a structure for integrating an inductor on a package substrate of a chip that provides the flexibility to meeting different size requirements.
SUMMARY OF THE INVENTION
The present invention is directed to a high inductance inductor in a semiconductor package. According to one embodiment, a number of trace metal segments or conductors are patterned onto a top surface of a substrate suitable for receiving and housing a semiconductor die. In one embodiment, an insulator layer covers the trace metal segments and separates them from a high permeability core which is mounted on top of the insulator layer. The insulator layer can comprise, for example, solder mask while the high permeability core can comprise, for example, a ferrite rod.
In one embodiment, a number of bonding wires are passed over the high permeability core and make connections to respective trace metal segments under the core so as to create an inductor winding around the core. The terminals of the inductor so formed can be connected to a substrate bond pad and/or to a semiconductor die bond pad. Due to the high permeability of the core, the inductance value of the inductor so formed can be quite high while the inductor has a relatively small size. Moreover, the present invention's inductor can be fine-tuned by adjusting the number of bonding wires in the inductor winding and also by adjusting the length of the high permeability core.
REFERENCES:
patent: 3614554 (1971-10-01), Shield et al.
patent: 6249039 (2001-06-01), Harvey et al.
patent: 6310393 (2001-10-01), Ogura et al.
patent: 6445271 (2002-09-01), Johnson
patent: 6462950 (2002-10-01), Pohjonen
Coccioli Roberto
Fazelpour Siamak
Hashemi Hassan S.
Farjami & Farjami LLP
Jr. Carl Whitehead
Skyworks Solutions Inc.
Vesperman William C
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