High impendance-coupled CMOS SRAM for improved single event immu

Details High impendance-coupled CMOS SRAM for improved single event immu High impendance-coupled CMOS SRAM for improved single event immu

1985-11-22

1989-02-14

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

365190, 365156, 357 236, G11C 1100, G11C 700

Patent

active

048051489

ABSTRACT:
A CMOS SRAM exhibiting a high level of immunity to single event upset errors, such as caused by ionizing radiation, is disclosed. In CMOS SRAM cells with small feature sizes, single event errors result from ion interactions with transistor drains on the side of a cell holding a low voltage. The configuration of the cell presents a high impedance between these low voltage drains and the low voltage gate on the opposite side of the cell, while presenting a high impedance between corresponding components with high voltages. The SRAM cell is protected from single event errors while minimizing the increase in switching speed which accompanies any increase in internal cell impedance.

REFERENCES:
patent: 3493786 (1970-03-01), Ahrons et al.
patent: 4023148 (1977-05-01), Heuber et al.
patent: 4095281 (1978-06-01), Denes
patent: 4130892 (1978-12-01), Gunckel, II et al.
patent: 4132904 (1979-01-01), Harari
patent: 4175290 (1979-11-01), Harari
patent: 4403306 (1983-09-01), Tokushige et al.
patent: 4418402 (1983-11-01), Heagerty et al.
patent: 4463273 (1984-07-01), Dingwall
patent: 4506349 (1985-03-01), Mazin et al.
patent: 4507759 (1985-03-01), Yasui et al.
patent: 4575821 (1986-03-01), Eden et al.

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