High-gain synchronizer circuitry and methods

Details High-gain synchronizer circuitry and methods High-gain synchronizer circuitry and methods

2006-11-21

2006-11-21

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

Having feedback

C327S565000, C327S155000

Reexamination Certificate

active

07138850

ABSTRACT:
High-gain synchronizer circuitry and methods are provided that reduce the meta-stable resolve time of a synchronizer circuit. The high-gain synchronizer is made up of high-gain latch circuits. The high-gain latch circuits are made up of a series of inverters that at least initially increase in size and that are connected in a closed loop. In accordance with the invention, the time that the high-gain synchronizer remains in the meta-stable state is minimized through the use of the high-gain latch circuits.

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