Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2002-04-15
2004-06-29
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S784000, C257S774000, C257S690000
Reexamination Certificate
active
06756683
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and particularly to a high-frequency semiconductor device for use in microwave communication, millimeter wave communication, and the like.
2. Related Art
In recent years, wireless communication devices that have rapidly become widespread, such as mobile telephones, tend to utilize microwave waveband or millimeter waveband. To process such high-frequency signals, research and development are being made of various techniques in the field of semiconductors. As one example of such techniques, a high-frequency device incorporates a matching circuit for getting the performance of an active element included in the device. Like this combination of an active element and a matching circuit, the MMIC (MonolithicMicrowave IC) technique is an example for integrating active elements and passive elements into one semiconductor device.
According to the MMIC technique, active elements and passive elements are formed on the same chip. Here, using for example a GaAs substrate with a high resistivity of about several tens M&OHgr;·cm can lower loss of passive elements (a spiral inductor, a transmission line, etc.). On the other hand, the use of a silicon substrate, which is cheaper than a GaAs substrate, cannot lower loss of passive elements because the silicon substrate has a low resistivity.
FIG. 1
is a graph showing the relationship between a resistivity (&OHgr;·cm) of a substrate and a loss (dB/m) per unit length of an Au wire, when the Au wire with a thickness of 3 &mgr;m and a width of 70 &mgr;m is laid on an oxide film with a thickness of 0.2 &mgr;m formed on the substrate. It should be noted here that the Au wire constitutes a transmission line with a resistivity of 50 &OHgr;.
As
FIG. 1
shows, a line loss varies depending on a frequency of a signal applied on the line. A lowering rate of the line loss is substantially saturated when the resistivity is around 100 k&OHgr;·cm. With the resistivity being raised above this value, the line loss is not drastically lowered any more. On the other hand, according to the single-crystal silicon formation technique presently being available, a resistivity of a silicon substrate has its maximum at about several k&OHgr;·cm, and so the present technique fails to form a silicon substrate having a resistivity higher than several k&OHgr;·cm.
In view of this difficulty, a semiconductor device disclosed in Japanese published unexamined application No. 2000-232212 is proposed as one example.
FIG. 2
is a cross sectional view of the semiconductor device relating to the disclosure. As
FIG. 2
shows, the semiconductor device
1
includes a silicon substrate
101
having a high resistivity achieved by diffusing Au therein. On the top surface of the silicon substrate
101
, an oxide film
102
is formed.
An SOI (Silicon On Insulator) layer
103
made of single-crystal silicon is embedded in the oxide film
102
. A source region
104
and a drain region
105
are provided each adjacent to the SOI layer
103
. The source region
104
and the drain region
105
are formed by impurities injected into the oxide film
102
. On the SOI layer
103
, a gate insulation film
106
is formed. Within the gate insulation film
106
, a gate electrode
107
is formed. In the remaining region on the oxide film
102
, an interlayer insulation film
108
is formed.
Above the source region
104
and the drain region
105
, contact holes
109
and
110
are respectively formed so as to pierce the inter layer insulation film
108
. The contact holes
109
and
110
are filled with tungsten
111
and
112
, to provide interlayer connection wires. On the interlayer insulation film
108
, aluminum wires
113
and
114
are laid. These aluminum wires
113
and
114
are electrically connected to the source region
104
and the drain region
105
respectively, via the interlayer connection wires.
The interlayer insulation film
108
, and the aluminum wires
113
and
114
are covered with a wire protection film
115
, to prevent short circuit and the like. The wire protection film
115
is, for example, a nitride film, an oxide film, or the like. In this semiconductor device
1
, a resistivity of the silicon substrate
101
is raised with the above-mentioned use of Au being diffused therein. Therefore, loss of passive elements can be lowered even though an expensive GaAs substrate is not used.
In the semiconductor device
1
, however, a countermeasure should be taken for preventing diffusion of Au atoms from the silicon substrate
101
into the SOI layer
103
. For this purpose, the oxide film
102
needs to be formed considerably thick, for example as thick as 2 &mgr;m. Forming such a thick oxide film increases the manufacturing cost, and therefore, the above conventional technique can be considered unpractical.
Also, in the semiconductor device
1
, passive elements and active elements are both formed on the silicon substrate
101
. This means that any defect occurring in an active element causes the entire semiconductor device including the passive element part to be rejected as defective, thereby degrading the manufacturing yield.
Further, passive elements, in particular a spiral inductor, occupy a large area of the substrate when being mounted onto the substrate. Considering this, the substrate with conforming passive elements being rejected only due to a defective active element is by no means favorable.
SUMMARY OF THE INVENTION
In view of the above problems, the object of the present invention is to provide a high-frequency semiconductor device at low cost and with high manufacturing yield, while lowering loss of passive elements.
The above object of the present invention can be achieved by a semiconductor device including: a silicon substrate that contains at least one of Au, Pt, and Cu in a state of being diffused, and on which a first circuit element is formed without a heating process; and a semiconductor chip in which a second circuit element is formed by a heating process, the semiconductor chip being flip-chip mounted to the silicon substrate.
According to this structure, such a case where the silicon substrate is heated due to a heating process for forming the active elements can be avoided. Therefore, diffusion of Au atoms present in the silicon substrate into other parts of the semiconductor device, in particular into the active elements, can be avoided. Therefore, a thick oxide film employed by the above conventional technique does not need to be provided, contributing to decreasing cost of the substrate and to downsizing the device.
REFERENCES:
patent: 5639683 (1997-06-01), Reyes
patent: 6384701 (2002-05-01), Yamada et al.
patent: 2000232212 (2000-08-01), None
Kunihisa Taketo
Nobusada Toshihide
Yahata Kazuhiro
Andújar Leonardo
Flynn Nathan J.
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