High dielectric constant gate oxides for silicon-based devices

Details High dielectric constant gate oxides for silicon-based devices High dielectric constant gate oxides for silicon-based devices

2000-02-07

2002-06-11

Lee, Eddie (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S506000, C257S527000, C257S623000, C257S627000, C257S632000, C438S207000

Reexamination Certificate

active

06404027

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an improved gate oxide material, and method of forming the same, for silicon-based devices and, more particularly, to the use of rare earth oxides, such as Gd
2
O
3
or Y
2
O
3
(exhibiting a dielectric constant ∈ on the order of 18) to form a gate oxide having the desired insulative properties while maintaining a thickness greater than the tunneling depth of approximately 10 Å.
BACKGROUND OF THE INVENTION
As integrated circuit technology advances, the gate lengths of MOSFETs become increasingly smaller. In addition, the thicknesses of the gate dielectrics, typically gate oxides, become thinner and thinner. Very thin gate oxides (i.e., less than 50 Å) are often necessary for sub-micron MOS devices.
As device dimensions scale down rapidly with the advance of technology, the electric field in the thin gate oxides continues to increase. Part of the consequences of such increased electric field is the increased trap generation at the oxide interface or within the thin oxides. The trap generation and the capture of channel electrons by the traps in turn leads to increased low frequency (l/f) noise and transconductance (g
m
) degradation. For ultra-thin gate oxides of less than 50 Å, the tunneling current also becomes significant and gives rise to accelerated degradation of the device characteristics. Indeed, the “thinness” of the conventional SiO
2
gate oxide is now approaching the quantum tunneling limit of 10 Å.
Instead of continuously attempting to reduce the SiO
2
thickness of the gate oxide, several groups have attempted to find a replacement insulator with a dielectric constant (∈) substantially greater than that of SiO
2
(∈=3.9), so that the dielectric thickness can then be proportionally increased (thereby reducing the chance of a tunneling current through the oxide). It is desirable that the dielectric being thermodynamically stable with respect to the silicon surface so as to prevent reactions leading to the formation of SiO
2
or metal silicides at the substrate/dielectric interface during high temperature annealing operations. To date, several “high dielectric” oxides have been considered (such as Al
2
O
3
, Ta
2
O
3
, TiO
2
), but in each case an interfacial SiO
2
layer at least 10 Å thick forms during growth of the gate oxide. An alternative approach uses a relatively thin SiN
y
barrier layer that is first deposited on the silicon surface to prevent the native oxide growth. However, the use of the barrier layer then requires for the total “effective” oxide thickness to exceed 15 Å, another unacceptable result.
Thus, a need remains in the art for a dielectric material to be used as a “thin” gate dielectric on silicon-based devices that prevents the formation of the native SiO
2
layer, yet also exhibits an effective thickness closer to 10 Å.
SUMMARY OF THE INVENTION
The need remaining in the prior art is addressed by the present invention, which relates to an improved gate oxide material, and method of forming the same, for silicon-based devices and, more particularly, to the use of rare earth oxides, such as Gd
2
O
3
or Y
2
O
3
(exhibiting a dielectric constant ∈ significantly greater than that of SiO
2
(approximately 4), for example, on the order of 18) to form a gate oxide having the desired insulative properties while maintaining a thickness greater than the tunneling depth of approximately 10 Å.
Films of Gd
2
O
3
or Y
2
O
3
are grown, in accordance with the present invention, on a “clean” silicon substrate surface, using an ultrahigh vacuum (UHV) vapor deposition process. It has been found that by limiting the oxygen partial pressure to less than 10
−7
during growth, oxidation of the silicon substrate surface is completely avoided. Both epitaxial and amorphous films have been found to form an oxide with the desired high dielectric constant characteristic.
In accordance with the present invention, a vicinal Si(100) substrate is preferably used, so as to promote the formation of single domain, (110)-oriented Gd
2
O
3
or Y
2
O
3
films. In a preferred embodiment a 4° miscut substrate may be used.
A post-process gas anneal process may also be used to improve the leakage current density from a value of, for example, 10
−1
A/cm
2
to 10
−5
A/cm
2
at 1V for a Gd
2
O
3
layer at an equivalent SiO
2
thickness of 19 Å.
Other and further aspects of the present invention will become apparent during the following discussion and by reference to the accompanying drawings.


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