High density two port memory cell

Details High density two port memory cell High density two port memory cell

1996-07-26

1998-08-11

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 36523005, 36518904, G11C 1100

Patent

active

057936692

ABSTRACT:
A gate array structure includes a plurality of transistors (21-47) interconnected to form a two-bit memory cell. First and second interconnected transistors of the plurality are respectively provided in adjacent base sites (51, 53) of the gate array structure.

REFERENCES:
patent: 5420813 (1995-05-01), Nii
patent: 5519655 (1996-05-01), Greenberg
Cheryl Ajluni, "Base Cell Design Spawns Advanced Arrays", Electronic Design, Sep. 19, 1994, pp. 178-179.

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