High density stacked die assemblies, structures incorporated...

Details High density stacked die assemblies, structures incorporated... High density stacked die assemblies, structures incorporated...

2009-09-21

2011-12-06

Pham, Hoai V (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S777000, C257SE25006, C257SE25013

Reexamination Certificate

active

08072055

ABSTRACT:
A stacked semiconductor die assembly includes at least two partially offset semiconductor dice with bond pads located adjacent at least one peripheral side thereof supported on a redistribution element formed of a material of substantially similar CTE to that of the dice, and a paddle-less lead frame secured to the redistribution element during fabrication, including encapsulation. The assembly is configured to be substantially vertically symmetrical with respect to inner ends of lead fingers of the lead frame to facilitate uniform encapsulant flow. The semiconductor die assembly may be configured in a package with leads extending from two sides thereof, such as a thin small outline package (TSOP), or four sides thereof, such as a quad flat pack (QFP).

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