Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Patent
1997-04-02
1999-04-20
Arroyo, Teresa M.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
257678, 257698, H01L 2348, H01L 2352, H01L 2940
Patent
active
058959785
ABSTRACT:
A high density and high I/O count packaging methodology and associated fabrication technique is presented. A semiconductor die having logic circuits for multiplexing specified sets of I/O logic is electrically connected to an interposer having semiconductor logic circuits for multiplexing selected sets of module pins to allow a reduced number of I/O pads on the die and matching interconnect pads on the interposer. The interposer connects the reduced number of die I/O pads to a higher number of module pins corresponding to the number of I/O functions on the die. The interposer is fabricated from a semiconductor substrate using standard semiconductor processes and materials.
REFERENCES:
patent: 5382827 (1995-01-01), Wang et al.
patent: 5502333 (1996-03-01), Bertin et al.
patent: 5517515 (1996-05-01), Spall et al.
Arroyo Teresa M.
International Business Machines - Corporation
Walsh Robert A.
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