High density multistate SRAM and cell

Details High density multistate SRAM and cell High density multistate SRAM and cell

1996-03-18

1996-12-24

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Semiconductive

365105, G11C 1136

Patent

active

055879446

ABSTRACT:
A high density multistate SRAM cell including N negative differential resistance diodes connected in series and to a load. The diodes and the load defining a memory node having N+1 stable states. A write transistor having a drain connected to the memory node and adapted to receive N+1 different amplitudes of voltage on the source, and a write signal on the gate. An amplifier having an input terminal connected to the memory node, and a read switch having an input terminal connected to the output terminal of the amplifier. A plurality of cells connected into a matrix with N+1 sense amplifiers associated with each column of the matrix so as to provide an output for each of the N+1 different amplitudes.

REFERENCES:
patent: 4573143 (1986-02-01), Matsukawa
patent: 5280445 (1994-01-01), Shieh et al.
patent: 5390145 (1995-02-01), Nakasha
patent: 5438539 (1995-08-01), Mori

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