High density MIM capacitor structure and fabrication process

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S307000, C257S296000, C257S516000, C257S532000, C438S239000, C438S253000, C438S396000, C438S957000

Reexamination Certificate

active

07317221

ABSTRACT:
A stacked integrated circuit (IC) MIM capacitor structure and method for forming the same the MIM capacitor structure including a first MIM capacitor structure formed in a first IMD layer comprising an first upper and first lower electrode portions; at least a second MIM capacitor structure arranged in stacked relationship in an overlying IMD layer comprising a second upper electrode and second lower electrode to form an MIM capacitor stack; wherein, the first lower electrode is arranged in common electrical signal communication comprising metal filled vias with the second upper electrode and the first upper electrode is arranged in common electrical signal communication with the second lower electrode.

REFERENCES:
patent: 6710425 (2004-03-01), Bothra
patent: 6777777 (2004-08-01), Kar-Roy et al.
patent: 2002/0056869 (2002-05-01), Morimoto
patent: 2002/0192919 (2002-12-01), Bothra
patent: 2004/0152258 (2004-08-01), Kiyotoshi
patent: 2005/0006771 (2005-01-01), Akiyama

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