High density integrated circuit packaging with chip stacking...

Details High density integrated circuit packaging with chip stacking... High density integrated circuit packaging with chip stacking...

1999-07-29

2001-05-22

Chaudhuri, Olik (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S686000, C257S777000, C257S786000

Reexamination Certificate

active

06236115

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to interconnection and packaging of integrated circuits and, more particularly, to high integration and packaging density and high performance integrated circuits, especially high capacity integrated circuit memories having improved noise immunity.
2. Description of the Prior Art
It has been long recognized that reduction in size of integrated circuits can provide numerous performance enhancements of the circuits produced as well as substantial economies in the manufacture thereof. In fact, at the present time, the operational speed of digital systems, sub-systems and circuits and elements thereof is often effectively limited by the time required for signal propagation over conductors interconnecting them and the individual circuit elements thereof, particularly because of the resistance and parasitic capacitances of the interconnections. Further, elongated and/or tortuously routed connections, unless well-supported such as by encapsulation or lamination may decrease manufacturing yield, if imperfectly formed, or may cause increased susceptibility to damage through vibration, shock, thermal excursions or cycling and other environmental effects and conditions after an integrated circuit or modular package containing a plurality of integrated circuits is placed in service.
To provide potentially complex connections between potentially large numbers of individual integrated circuit chips (which may also be formed with diverse and mutually incompatible processes, while answering the above concerns to a substantial degree) so-called multi-layer modules (MLMs) have become known and highly developed as a packaging structure for highly complex and high performance electronic circuits.
Such modular packages have a complex array of connections made by patterns of conductors on the surfaces of each of a plurality of individual lamina (e.g. in ceramic structures the uncured ceramic lamina are referred to as “green sheets” with patterns formed thereon by conductive paste extruded thereon through a mask) which are then laminated together into a unitary structure with the conductive patterns embedded therein. Connections through lamina from one conductor pattern to another are generally accomplished by extruding the same conductive paste into holes or “vias” in the lamina although other materials and techniques, such as embedding conductive spheres and/or pins in the lamina, are known and can be used. Integrated circuits and connection structures (e.g. pins) are then mounted on respective surfaces thereof and the completed device with integrated circuits thereon is encapsulated to complete the device package.
Integrated circuit chips are generally mounted in a single layer modular circuit packages or devices and other structures, such as printed circuit boards, using so-called surface mount technology (SMT) in which connection pads on chips are soldered, using any of a plurality of techniques of solder application, to corresponding pads on the surface of a carrier, such as an MLM or circuit board. To save space and reduce length of some connections, it is known to mount one integrated circuit chip over another chip (generally of a similar type, such as memory chips) by commonly connected lead frames which, in turn, make connections to pads on each chip. In such arrangements, however, the connection path is not optimal since connections to each chip, which may in some cases be made in several layers, extend to and from a distance beyond the edge of the chip due to the use of a lead frame structure. However, since common connections are most often required to similar locations on each chip, such a structure results in additional conduction path length with attendant performance limitations and exposure to electrical noise.
Since the lead frame consumes additional space on the surface of the carrier, there is also a limitation on integrated circuit packing density due to the lead frame even when several circuits are stacked. Further, attachment of the lead frame to the chips and attaching the lead frames together and to the supporting structure, such as an MLM, may adversely affect manufacturing yield. Encapsulation of the lead frame may also be imperfect, compromising resistance of the overall circuit to damage from vibration, thermal effects and the like, mentioned above. Additionally, the extended conductors inherent in a lead frame cannot be effectively shielded and are therefore subject to electrical noise.
In summary, while interconnection techniques have become highly advanced and reliable and have supported significant performance increases, they are inherently not optimized and continue to impose limits on electrical performance, circuit durability and reliability, circuit density and manufacturing yield. Further, the use of lead frames and the manipulations thereof as well as attachment of lead frames to form common connections and encapsulation processes necessitated when chips are stacked are costly and contribute significantly to the total cost of the package.
At least since the development of the personal computer, it has been considered desirable to provide removable and interchangeable memory structures such as so-called floppy disks. Interchangeability of memory structures enables reduction of the amount of data and applications programs which are resident on the machine itself and allows portability of data between machines without a requirement for networking or other communication facilities. The reduction of size of floppy disks to sizes which may be carried in a user's pocket has been found to be an extremely convenient attribute. Removability provides security of data and/or application programs from corruption in the event of system malfunction such as in familiar back-up duplication of files and logging for archival storage of the state of data at particular points in time. Additional security is also possible since removable storage media may be conveniently stored under high security conditions (e.g. in a safe) without the need to secure the entire machine or system. Other security facilities, such as passwords, may be made specific to individual storage media or files to further limit access to data and/or programs stored thereon.
While these functions are most often accomplished (at least for personal computers) by so-called floppy disks, drives for these disks are slow and storage capacity of the floppy disks is limited although substantial gains have been made in both speed of access and storage capacity in recent years. Alternative storage media having higher performance are known but are generally less convenient or considerably more expensive to the point of impracticality for most personal computer applications and users. Removal and substitution of circuit boards containing non-volatile storage is an appropriate example since non-volatile memory is extremely expensive and/or requires a self-contained power supply. circuit boards are difficult to install and remove from the computer and arrangements increasing the convenience of doing so may compromise the reliability of connections thereto when numerous insertions and removals of the memory structure are contemplated. Further, when not installed in the computer, the contacts must be physically protected in a manner which is convenient and natural to the user.
Nevertheless, solid state memory in the form of interchangeable, plug-in memory cards is being increasingly used in mobile and portable computing architectures which have additional security and environmental (e.g. temperature, moisture, etc.) concerns. Current technology for these devices utilizes Thin Small Outline Packages (TSOP) for the chips mounted on 15-20 mil thick glass epoxy laminate boards with low stand-off distances. The boards are then encased in a plastic frame with a metallic cover. These structures, however, are subject to numerous problems at the present state of the art.
Specifically, memory modules having such a structure have a large c

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