High current high voltage vertical PMOS in ultra high voltage CM

Details High current high voltage vertical PMOS in ultra high voltage CM High current high voltage vertical PMOS in ultra high voltage CM

1993-12-14

1994-09-20

Carroll, J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257339, 257343, 257630, H01L 2968, H01L 2978, H01L 2940

Patent

active

053492234

ABSTRACT:
A vertical transistor which is built in a substrate of a given first carrier type utilizing standard processes but which has a unique layout which facilitates high voltage, high current operation while still conserving space. The transistor is built utilizing a repeatable combination gate/source area that is built in the upper area of the substrate such that the remaining lower portion of the substrate underneath the combination gate/source area is the drain area of the transistor.

REFERENCES:
patent: 3821776 (1974-06-01), Hayashi et al.
patent: 5250449 (1993-10-01), Kuroyanagi et al.

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