Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
1998-06-23
2002-11-05
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S666000, C257S784000, C257S786000, C257S787000, C257S775000, C257S698000, C257S676000, C257S692000, C257S693000, C257S684000, C257S796000, C361S813000, C029S827000, C174S050510, C174S050510
Reexamination Certificate
active
06476481
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a high power semiconductor device lead frame and package containing enlarged connection posts and conductors with a novel lead sequence and having an increased dielectric creepage distance between adjacent leads and having a modified outline.
Semiconductor devices such as diodes, thyristors, MOSgated devices such as MOSFETs, IGBTs and the like are commonly formed in a silicon semiconductor die containing the device junctions. The die have metallized bottom drain or other power electrodes and have source and gate electrodes or other power electrodes on their upper surface. The die are mounted on enlarged conductive lead frame pads and the power electrodes on the upper die surface have connection wires which are wire bonded by plural wires from the conductive electrode area of the die to flat connection post areas which are in turn connected to the exterior lead conductors of the lead frame. These exterior lead conductors extend through a molded housing which overmolds the lead frame and die. The lead frame will contain a plurality of identical sections, for example, 20 or more sections which are simultaneously processed to receive separate die and wire bonds and overmolding. The individual devices are then separated after the molding process. The final device may have well known industry standard package outlines, for example, the well known TO220 or TO247 package outlines.
Known package structures have a current capacity which is limited by the number of parallel bonding wires which can connect the die power electrode, for example, the source electrode of a power MOSFET or the cathode of a diode to a corresponding lead frame post. It would be desirable to arrange the lead frame so that an increased number of parallel bonding wires can be used to reduce package resistance without increasing the size of the package.
Known package structures, particularly for MOSgated devices such as power MOSFETs also conventionally have parallel external lead conductors in a sequence of gate, drain and source. This causes an added spacing between gate and source leads. It would be very useful to have the gate and source leads adjacent to one another, while maximizing the source post area. It would be further desirable to increase the conduction cross-sectional area of the source or other elongated external leads.
In conventional molded housing packages the lead frame conductors extend from the interior of the high dielectric housing to the area exterior of the package. The “creepage” distance along the surface of the package is thus related to the external spacing of the external conductors, and limits the maximum voltage which can be applied between these leads. It would be desirable to increase the creepage distance along the package surface at which the lead frame leads extend out of the package without increasing the size of the package.
Known package structures have lead conductors extending outwardly from the lead frame and through the plastic housing surface. These lead conductors are contentionally rectangular, or V-shaped and are designed to fit into a metallized opening in a printed circuit board. The cross-section of these conductors must be large enough to carry the device current without excessive heating. However, the diameter of the holes in the board is limited, because their spacing is determined by the spacing of the device lead conductors and their conductive bushings. It would be desirable to increase the cross-sectional area of these lead conductors, without excessively increasing the diameter of the holes in the circuit board which receives the conductor.
The present package outline has a relatively thick plastic volume which is joined to a thinner volume by a vertical rise. The thicker region extends from the lead conductor edge of the package to the vertical rise which is located above a central region of the die. The thinner volume extends to the end of the package which is opposite to its output lead conductor side. the vertical rise to the thicker region of the package forms a 90° angle to the top surface of the thicker region. The material within this sharp angle tends to accumulate bubbles in the plastic during molding which leads to device rejections and failure.
Further, when devices of the above outline are to be surface mounted on a support board and held in place by a cantilevered spring, the spring presses atop the surface of the thick plastic region. Consequently, spring pressure is applied at a location which is removed from over the center of the die. It would be desirable to have the point of application of the spring pressure located over the center of the die which is mounted within the package. It would be further desirable to simplify the mounting of the package under a cantilevered spring without requiring special tools.
BRIEF DESCRIPTION OF THE INVENTION
In accordance with a first feature of the invention it is recognized that the area of the drain post and gate post of the lead frame can be smaller than that of the source post and the area then made available can be used to increase the source post area. This makes it possible to use an increased number of bonding wires to bond the die source electrode to the source post of the lead frame, thus increasing the current carrying capacity of the package.
In accordance with another feature of the present invention, a novel lead frame structure is provided in which, for a MOSFET type package for example, the lead frame external lead sequence is changed from the prior art gate, drain, source, to a novel sequence of gate, source, drain. This new sequence improves the application of the device by reducing the spacing between gate and source connections, thus reducing the leakage inductance of the gate circuit. The novel new sequence further makes it possible to increase the area of the source post and to decrease the area of the drain post (which has a very wide area bottom die connection area), and makes it possible to use an increased number of bonding wires from the die source to the lead frame source pad to reduce package resistance without increasing the package size.
A further feature of the invention permits an outward (from the lead frame center) reentrant bend of the two outermost leads from the centermost lead frame lead where the lead conductors exit from the package, without reducing lead conduction cross-section. This outward reentrant bend increases the creepage distance between the outer leads and center lead along the surface of the package insulation to increase the breakdown voltage of the device. By an outward reentrant bend is meant a bend which redirects an elongated conductor to a generally perpendicular path away from the center of the package, and then again redirects the elongated conductor to a path which is parallel, but spaced from its original path.
A further feature of the invention comprises the increase in cross-sectional area of the lead frame external conductors without requiring a significant increase in board hole diameter. Thus, in a first embodiment it was found that making the normally rectangular conductor more square in shape, that a larger area of copper conductor can fit into the same diameter opening. Further, it was found that the use of a slight chamfer of the edges of the rectangular conductor will increase the total cross-section of the final conductor.
As a still further feature of the invention, the plastic package outline is modified so that it has a uniform thickness and flat top exterior surface extending from the lead conductor edge and atop substantially the full area of the interior die. The end wall of the package opposite to the lead conductors is then tapered down toward the package bottom and edge at an angle of about 45° to the vertical.
As a result of this novel structure, when the package is mounted by a cantilevered spring, the center of the spring force against the top of the package can be centered over the center of the die, which is the most efficient location for application of force to
Ewer Peter R.
Teasdale Ken
Woodworth Arthur
International Rectifier Corporation
Ostrolenk Faber Gerb & Soffen, LLP
Williams Alexander O.
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