High breakdown voltage CMOS device

Details High breakdown voltage CMOS device High breakdown voltage CMOS device

2005-03-08

2005-03-08

Loke, Steven (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S372000, C257S373000, C257S376000

Reexamination Certificate

active

06864543

ABSTRACT:
A semiconductor device for a charge pump device suitable for providing large current capacity and preventing a latch up from occurring is offered. A first and a second N-type epitaxial silicon layers are stacked on a P-type single crystalline silicon substrate, and a P-type well region is formed in the second epitaxial silicon layer. A P+-type buried layer is formed abutting on a bottom of the P-type well region, and an MOS transistor is formed in the P-type well region. The MOS transistor has a first source layer N+S of high impurity concentration, a first drain layer N+D of high impurity concentration and a second source layer N−S and/or a second drain layer N−D of low impurity concentration, which is diffused deeper than the first source layer N+S of high impurity concentration and the first drain layer N+D of high impurity concentration.

REFERENCES:
patent: 6570229 (2003-05-01), Harada

Affiliated with

Also associated with

Rating

High breakdown voltage CMOS device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High breakdown voltage CMOS device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High breakdown voltage CMOS device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3409368