Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2001-03-17
2004-06-29
Ray, Gopal C. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S313000, C714S002000, C714S022000, C361S695000
Reexamination Certificate
active
06757774
ABSTRACT:
BACKGROUND OF THE INVENTION
While business growth has been robust in the last few years, one of the largest areas of growth in many businesses has been the continuing increase in data handling and storage. With the increase in utilization of large database applications, improved processing power by single- and multiple-processor systems, and migration of multimedia applications into mainstream office tools, businesses and organizations have greatly increased their need for large amounts of storage.
Large volumes of data are only useful if the data can be accessed quickly and reliably. Increased reliability is commonly achieved by usage of redundant elements and by increasing availability. In high-availability applications, data must be constantly available with minimal planned and unplanned downtime. High availability is measured at the system level and quantified as the percentage of time the system is in a state to do useful work.
SUMMARY OF THE INVENTION
What is needed is a storage system that promotes reliability through usage of redundant, high-availability components.
A storage system promotes reliability and high-availability using a highly-redundant interface chassis and a multiple-path interface card that supports access to multiple buses on a backplane. In one example, a Small Computer System Interface (SCSI) disk enclosure has multiple redundant power supplies, multiple redundant cooling elements, and multiple interface cards. The interface cards are multiple-path interface cards. For example, two-path interface cards supply access to two buses on a backplane and has two connectors. Each connector has an isolated path to each bus on the backplane and termination on the card. Isolation of the connectors allows a user to disconnect cables from one connector without affecting the other connector.
In accordance with one aspect of the present invention, an enclosure includes a housing, redundant power supply slots for receiving and coupling to one or more power supplies, redundant fan slots for receiving and coupling to one or more fan cards, and redundant bus controller card slots for receiving and coupling to one or more bus controller cards. The individual redundant controller card slots have a first back plane connector for coupling to an odd bus and a second back plane connector for coupling to an even bus. The odd bus and even bus are accessible independently through the enclosure.
In accordance with another aspect of the present invention, a storage system includes one or more enclosures, and first and second buses. The enclosures include a housing, redundant power supply slots for receiving and coupling to one or more power supplies, redundant fan slots for receiving and coupling to one or more fan cards, and redundant bus controller card slots for receiving and coupling to one or more bus controller cards. The individual redundant controller card slots have a first back plane connector for coupling to an odd bus and a second back plane connector for coupling to an even bus. The odd bus and even bus are accessible independently through the enclosure. Inserted into the enclosures are one or more fans coupled to the redundant fan slots, one or more power supplies coupled to the redundant power supply slots, and one or more bus controller cards coupled to the redundant bus controller card slots. The first bus is coupled to the one or more enclosures and configured as an even bus. The second bus is coupled to the one or more enclosures and configured as an odd bus.
REFERENCES:
patent: 4955020 (1990-09-01), Stone et al.
patent: 5754804 (1998-05-01), Cheselka et al.
patent: 6078503 (2000-06-01), Gallagher et al.
patent: 6614752 (2003-09-01), Parrish et al.
Benson Anthony J
DeBlanc James J.
Hewlett--Packard Development Company, L.P.
Ray Gopal C.
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