Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-07-04
2006-07-04
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07073150
ABSTRACT:
Some embodiments provide a hierarchical routing method that uses diagonal routes. This method routes a net within a particular region of an integrated circuit (“IC”) layout. This net includes several pins in the region. The method initially partitions the particular IC region into a first set of sub-regions. It then identifies a first route that connects a group of first-set sub-regions that contain the net's pins. The identified first route has an edge that is at least partially diagonal. The method next partitions the first-set sub-regions into a second set of smaller sub-regions. It then propagates the first route into the second-set sub-regions.
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Buset Oscar
Teig Steven
Cadence Design Systems Inc.
Smith Matthew
Stattler Johansen & Adeli LLP
Tat Binh
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