Hierarchical redundancy scheme for high density monolithic memor

Details Hierarchical redundancy scheme for high density monolithic memor Hierarchical redundancy scheme for high density monolithic memor

1993-07-23

1994-12-27

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Bad bit

365201, G11C 700, G11C 2900

Patent

active

053771460

ABSTRACT:
Hierarchical redundancy is implemented in a monolithic memory by providing standard row and column redundancy augmented by redundant blocks, each having its own internal row and block redundancy. The efficiency of the redundant blocks is further enhanced by subdividing the redundant blocks into individually replaceable segments of rows or columns. A test and repair algorithm utilizing the hierarchical redundancy scheme is also provided.

REFERENCES:
patent: 4389715 (1983-06-01), Eaton, Jr. et al.
patent: 4757474 (1988-07-01), Fukushi et al.
patent: 4860260 (1989-08-01), Saito et al.
patent: 4881200 (1989-11-01), Urai
patent: 5206831 (1993-04-01), Wakamatsu

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