Hierarchical processing apparatus

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C382S181000, C382S195000, C382S240000

Reexamination Certificate

active

07028271

ABSTRACT:
A hierarchical processing apparatus includes a data input unit for time-sequentially inputting pattern data in a particular hierarchical level, a calculation parameter control data memory for storing calculation parameter control data, a local area recognition module for detecting a particular feature from pattern data, using the calculation parameter control data, and an intermediate result storage module for storing an intermediate result output from the local area recognition module. Depending on the hierarchical level of processing, a flow of data is controlled such that an input acquired via the data input unit or an intermediate result fed back from the intermediate result storage module and calculation parameter control data read from the calculation parameter control data memory are supplied to the local area recognition module. The hierarchical processing apparatus can perform various kinds of complicated calculations using a simple small-scale circuit with low power consumption.

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