Boots – shoes – and leggings
Patent
1992-01-23
1994-09-20
Shaw, Gareth D.
Boots, shoes, and leggings
3642821, 3642831, 364DIG2, 36491796, G06F 1560
Patent
active
053496590
ABSTRACT:
A system and method are described for decreasing the synthesis time required for realizing digital circuit net lists using library logic elements. The system consists of a logic processor working in concert with a cell library register, a hierarchical cell array memory, and a match register, for the purpose of hierarchically ordering, matching and eliminating equivalencies in the canonical forms of library cells. The method includes the reduction of all library elements to their canonical forms and the hierarchical ordering of the these canonicals based on the number of nodes contained in each element. Once ordered, the canonicals are mapped by logic elements having fewer nodes, beginning with the simplest of the canonical forms. Redundantly mapped logical elements are eliminated and the resulting reduced set is stored for subsequent use.
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Do Cuong
Wei Ruey-Sing
Backenstose Jonathan Aloha
Cadence Design Systems Inc.
Fernandez Dennis S.
Kaslow Kenneth M.
Shaw Gareth D.
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