Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-08-16
2005-08-16
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06931613
ABSTRACT:
A method of calculating electrical interactions of circuit elements in an integrated circuit layout without flattening the entire database that describes the layout. In one embodiment, a hierarchical database is analyzed and resistance and capacitance calculations made for a repeating pattern of elements are re-used at each instance of the repeated pattern and adjusted for local conditions. In another embodiment, a circuit layout is converted into a number of tiles, wherein the resistance and capacitance calculations made for the circuit elements in the center and a boundary region of the tiles are computed separately and combined. Environmental information that affects electrical interaction between circuit elements in different levels of hierarchy is calculated at a lower level of hierarchy so that such calculations do not need to be made for each placement of a repeated cell and so that not all interacting elements need to be promoted to the same hierarchy level to compute the electrical interactions.
REFERENCES:
patent: 5452224 (1995-09-01), Smith et al.
patent: 5610833 (1997-03-01), Chang et al.
patent: 5629860 (1997-05-01), Jones et al.
patent: 5901063 (1999-05-01), Chang et al.
patent: 6099581 (2000-08-01), Sakai
patent: 6175947 (2001-01-01), Ponnapalli et al.
patent: 6230299 (2001-05-01), McSherry et al.
patent: 6289412 (2001-09-01), Yuan et al.
patent: 6363516 (2002-03-01), Cano et al.
patent: 6438729 (2002-08-01), Ho
patent: 6449754 (2002-09-01), You et al.
patent: 6499131 (2002-12-01), Savithri et al.
patent: 6625611 (2003-09-01), Teig et al.
patent: 6701492 (2004-03-01), Jaklic et al.
patent: 2002/0104063 (2002-08-01), Chang et al.
patent: 2002/0112216 (2002-08-01), Keller et al.
Gibson Patrick D.
Grodd Laurence W.
Hertz Kurt C.
Kauth Thomas H.
Christensen O'Connor Johnson & Kindness PLLC
Dimyan Magid Y.
Garbowski Leigh M.
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