Hierarchical cache memory system and method for controlling data

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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711117, 711118, 711154, 711160, G06F 1208, G06F 1300

Patent

active

058290249

ABSTRACT:
A hierarchical memory system having a cache memory for storing a portion of data stored in a main memory. The cache memory is divided into hierarchically ordered primary and secondary cache memories. The primary cache memory being connected to a processor. The larger secondary cache memory being connected to the primary cache memory and to a bus connected to the main memory. When a cache miss-hit is made in the secondary cache memory, at the time of access by the processing unit, the secondary cache memory notifies the primary cache memory of an address of a replacement entry prior to seeking a data transfer. The primary cache memory, when it has an entry corresponding to the replacement entry, makes the corresponding entry the replacement entry. When the primary cache memory does not have an entry corresponding to the replacement entry, the primary cache memory makes an entry based on a predetermined replacement priority and then enters data transferred from the secondary cache memory into the replacement entry.

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