Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate
2006-07-04
2006-07-04
Dickey, Thomas L. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
C257S195000, C257S192000, C257S280000
Reexamination Certificate
active
07071499
ABSTRACT:
In a heterojunction field effect type semiconductor device, a channel layer is formed over a GaAs substrate, and a first semiconductor layer including no aluminum is formed over the channel layer. First and second cap layers of a first conductivity type are formed on the first semiconductor layer, to create a recess on the first semiconductor layer. First and second ohmic electrodes are formed on the first and second cap layers, respectively. A second semiconductor layer of a second conductivity type is formed on the first semiconductor layer within the recess, and the semiconductor layer is isolated from the first and second cap layers. A gate electrode is formed on the second semiconductor layer.
REFERENCES:
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patent: 0940855 (1999-09-01), None
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Y. Bito et al., “64% Efficiency Enhancement-Mode Power Heterojunction Fet for 3.5 V Li-ION Battery Operated Personal Digital Cellular Phones”, 1998 IEEE MTT-S Int. Microwave Symp-Dig., Jun. 1998, pp. 439-442 with Abstract.
S. Wada et al., “0.1-μm p+-GaAs Gate HJFET's Fabricated Using Two-Step Dry-Etching and Selective MOMBE Growth Techniques”, IEEE Transactions on Electron Devices, vol. 45, No. 6, Jun. 1998, pp. 1383-1389 with Abstract.
K. Nishii et al., “High Current/gm Self-Aligned PJ-HFET of Completely Enhancement-Mode Operation”, Extended Abstracts of the 1998 International Conference on Solid-State Devices and Materials, 1998, pp. 396-397.
K. Nishii et al.; “High Current/gm Self-Aligned PJ-HFET of Completely Enhancement-Mode Operation”; Extended Abstracts of the International Conference on Solid State Devices and Materials; Japan Society of Applied Physics, Tokyo, Japan; Sep. 1998; pp. 396-397.
Y. Bito et al.; “64% Efficiency Enhancement-Mode Power Heterojunction FET for 3.5 V Li-ION Battery Operated Personal Digital Cellular Phones”; 1998 IEEE MTT-S International Microwave Symposium Digest; IMS '98; Progress Through Microwaves; Baltimore, MD, Jun. 7-12, 1998; IEEE MTT-S International Microwave Symposium Digest, New York, NY: IEEE, US, vol. 2, Jun. 7, 1998; pp. 439-442.
Y. Bito et al., Institute of Electrical and Electronics Engineers; “Enhancement-Mode Power Heterojunction FET utilizing Re-grown P+-GaAs Gate with Negligible Off-state Leakage Current”; 2003 IEEE MTT-S International Microwave Symposium Digest; (IMS 2003); Philadelphia, PA, Jun. 8-13, 2003; IEEE MTT-S International Microwave Symposium, New York, NY: IEEE, US, vol. 3 of 3, Jun. 8, 2003; pp. 703-706.
Dickey Thomas L.
NEC Electronics Corporation
Sughrue & Mion, PLLC
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