Heterojunction field effect transistor with two-dimensional elec

Details Heterojunction field effect transistor with two-dimensional elec Heterojunction field effect transistor with two-dimensional elec

1986-12-09

1988-08-16

Edlow, Martin H.

357 4, 357 22, H01L 2712, H01L 29161, H01L 2980

Patent

active

047647965

ABSTRACT:
A field effect transistor utilizing semiconductor hetero junction having a high mutual conductance, low noise, and a reduced source resistance, has a gallium indium arsenide mixed crystal semiconductor layer (23) providing a current path, low resistance indium phosphide layers formed on or under the gallium indium arsenide mixed crystal semiconductor layer (23) by ion-implantation for achieving the reduced source resistance, a source electrode (6), a gate electrode (5) and a drain electrode (7) which are formed on the surface of an uppermost aluminum indium arsenide mixed crystal semiconductor layer (24), an ion-implanted layer located at least in a region to form the reduced source resistance between the source electrode (6) and a two-dimensional electron layer (8) within the gallium indium arsenide mixed crystal semiconductor layer (23).

REFERENCES:
patent: 4673959 (1987-06-01), Shiraki et al.
IEEE Electron Device Letters, vol. EDL 1, No. 9, 9/80, Barnard et al. pp.174-176.
"Depletion Mode Modulation Doped A1.sub.0.48 In.sub.0.52 As-GA.sub.0.47 In.sub.0.53 AS Heterojunction Field Effect Transistors" by Chen et al., IEEE Electron Device Letters, vol. EDL-3, No. 6, Jun. 1982, pp. 152-155.
"Rapid Thermal Annealing of Se and Be Implanted InP Using an Ultrahigh Power Argon Arc Lamp" Choudhury, et al; (Applied Physics Letter 43(4), of Aug. 15, 1983, American Institute of Physics, 1983; pp. 381-383.
"Gallium Arsenide and Related Compounds 1985", Edited by M. Fujimoto, Institute of Physics Conference Series Number 79, Adam Hilger Ltd., Bristol and Boston, Proceedings of 12th International Symposium, by K. Hirose et al., pp. 529-534.

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