Heterojunction FET with doubly-doped channel

Details Heterojunction FET with doubly-doped channel Heterojunction FET with doubly-doped channel

1984-12-27

1987-06-16

James, Andrew J.

357 16, 357 58, H01L 2980

Patent

active

046739599

ABSTRACT:
There is disclosed a semiconductor device comprising at least first and second semiconductor layers positioned to form a hetero-junction therebetween, such a hetero-junction being adapted to form a channel, means for controlling carriers, and source and drain areas on opposite edges of the channel, wherein the first and second semiconductor layers formed between the source and drain regions have an area containing only 10.sup.16 cm.sup.-3 or less of an impurity; the first semiconductor layer has a wider forbidden band than that of the second semiconductor layer; and further including at least one semiconductor layer having a higher activation efficiency of impurities than that of the first semiconductor layer, with such at least one semiconductor layer being located on the side of the first semiconductor layer not in contact with the second semiconductor layer. A multi-quantum well structure may be used as the higher impurity activation efficiency semiconductor layer. The electrical resistance in the semiconductor area constituting the source and drain regions can be lowered by utilizing such a higher impurity activation efficiency semiconductor layer.

REFERENCES:
patent: 4194935 (1980-03-01), Dingle et al.
patent: 4503600 (1985-03-01), Nii et al.
Hiyamizu et al, "MBE-Grown GaAs/N-AlGaAs Heterostructures and their Application to High Mobility Transistors", Jap. Jour. of Appl. Physics, vol. 21, 1982, Supplement 21-1, pp. 161-168.
Thurne et al, "Performance of Inverted Structure Modulation Doped Schottky Barrier Field Effect Transistors", Jap. Jour. of Appl. Physics, vol. 21, No. 4, Apr. 1982, pp. 1223-1224.

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