Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2002-02-14
2003-03-11
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S235000, C438S320000, C438S345000, C438S364000
Reexamination Certificate
active
06531369
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention generally concerns Heterojunction Bipolar Transistors (HBT)s and, more particularly, a HBT device formed through the selective deposition of silicon germanium (SiGe) in the base region.
Rapid progress has occurred in the development of high performance bipolar and BiCMOS integrated circuits for applications such as high speed data and RF wireless communications. SiGe heterojunction bipolar technology offers economically feasible solutions with comparable performance characteristics to III-V technologies. The critical performance criteria include high frequency performance, low noise at both low and high frequency, sufficiently high intrinsic gain, and high breakdown voltages.
The integration of SiGe into the silicon bipolar base processing has been of interest because of the resulting improvements in electrical properties such as transmit frequency (Ft), Early voltage (Va), and collector-to-emitter breakdown (BVceo). The band gap at the collector side can be reduced by substituting germanium (Ge) for silicon (Si) in the base region of a bipolar transistor. This results in an electric field in the base, which reduces the majority carriers transit time through the base. SiGe films can be integrated into silicon processing with much less difficulty than other materials. However, even the use of structurally similar materials, such as Si and Ge, results in lattice mismatches on the crystal boundary area. Further, the formation of very thin base regions is complicated by the fact that boron implantation, even at an energy as low as 5 Kev, can still penetrate 1000 Å, into the base collector junction.
Different techniques have been proposed to integrate SiGe into the base of a bipolar device. These techniques are classified into two categories: blanket SiGe film deposition and selective SiGe film deposition. The blanket SiGe deposition method produces less silicon defects, and, therefore, higher yields. Thin, heavily doped, film can be produced with this method using growth rates of 25 to 100 Å per minute. However, blanket deposition processes are difficult to integrate into standard bipolar fabrication processes. Undesired areas of SiGe cannot easily be etched away without damaging the thin, intended base region. Although nonselective deposition is less complicated in terms of nucleation, microloading effects and faceting, it has to be done at an earlier state in the front-end fabrication sequence for patterning purposes. The stability of the film is frequently compromised due to the number of thermal cycling and etching steps, excessive dopant out-diffusion, and defect formation.
Alternately, selective deposition techniques can be used to form the base electrode and base region underlying the emitter. Selective deposition process can be used to grow SiGe only on silicon areas, so that the process is self-aligned. Selective deposition can be done at a later stage which makes its integration much less complicated. The process is less complicated because post-deposition patterning is not required, the process is self-aligned, and extraneous thermal cycles are avoided. Although selective SiGe film deposition is conceptually simple, there are problems concerning the connection of the SiGe base to the base electrodes, and with defect formation near the emitter-base junction. However, if these particular problems could be solved, the selective deposition of SiGe in the fabrication of HBTs would result in higher yields and better electrical performance.
It would be advantageous if an HBT base region could be reliably fabricated using a selective SiGe deposition, at a later stage in the fabrication sequence, to minimize exposure of the SiGe layer to undesired heat cycles and chemical processes.
It would be advantageous if a SiGe base could be self-aligned, and formed without the necessity of post-deposition patterning.
It would be advantageous if a selectively deposited SiGe base could be formed subsequent to the formation of the base electrode layer to avoid annealing and chemical etch processes which act to degrade a SiGe film.
It would be advantageous if a selectively deposited SiGe base could be protected during the formation of the emitter window to prevent defects along the emitter-base junction.
SUMMARY OF THE INVENTION
A Heterojunction Bipolar Transistor is provided comprising:
a collector region;
a silicon germanium (SiGe) base region overlying the collector region;
a silicon base electrode at least partially overlying an extrinsic region of the base region; and
an contact, connecting the extrinsic region of the base region to the base electrode.
A sacrificial oxide layer temporarily overlies the collector region and underlies the silicon base electrode. After etching, an extrinsic region of the base is formed in the region temporarily occupied by the sacrificial oxide layer.
In some aspects of the invention the base region has a SiGe bottom surface and a SiGe top surface, and further comprises:
a bottom silicon cap layer separating the collector region and the SiGe bottom surface; and
a top silicon cap layer separating the SiGe top surface from the emitter region. Then, the protective oxide layer is formed by oxidizing the top Si-cap.
The HBT also has dielectric sidewalls to define the emitter electrode, and include a window between the emitter electrode and the base region top surface. The temporary protective oxide layer is formed after the SiGe deposition, and is removed after the formation of the dielectric sidewalls, before the formation of the emitter region.
A method for fabricating an HBT is also provided comprising:
selectively depositing a silicon germanium (SiGe) composition to form a base region with a top surface;
forming a protective layer of oxide overlying the base region top surface;
forming dielectric sidewalls to define an emitter region;
etching to remove the protective oxide layer overlying the base region top surface; and
forming an emitter overlying the base region.
The contact from the SiGe base region to the base electrode is made by depositing a sacrificial layer of oxide overlying the gate oxide layer;
depositing a layer of silicon overlying the sacrificial layer of oxide, forming a base electrode;
depositing a layer of nitride overlying the silicon layer;
depositing a layer of TEOS overlying the nitride layer, forming a TEOS
itride/silicon stack;
patterning an emitter window in the TEOS
itride/silicon stack; and
etching the sacrificial oxide layer to form an undercut between the underlying silicon collector region, and the overlying base electrode.
The selective deposition of SiGe includes filling the undercut formed between the silicon collector region and the base electrode, forming an extrinsic contact with the overlying silicon layer. Typically, the SiGe layer is graded with respect to Ge content.
Some aspects of the invention further comprise:
depositing a silicon bottom cap layer to separate the collector region from the base region, and depositing a silicon top cap layer overlying the SiGe. The formation of the protective oxide layer typically involves oxidizing the silicon top cap overlying the SiGe base region. A high-pressure low-temperature (HIPOX) process oxidizes the base region top surface at a temperature in the range of 600 to 700 degrees C., and a pressure in the range of 10-25 atmospheres. The resulting oxide layer has a thickness in the range of 50 to 250 Angstroms (Å). Alternately, a Si-cap is not used, and the top surface of the SiGe base is oxidized.
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Ozkan Cengiz S.
Salmi Abderrahmane
Applied Micro Circuits Corporation
Gray Cary Ware & Freidenrich
Lee Eddie
Meador Terrance A.
Richards N. Drew
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