Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2008-04-29
2008-04-29
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C257S197000
Reexamination Certificate
active
10857655
ABSTRACT:
Disclosed are a heterojunction bipolar transistor and a method of fabricating the same. A first dielectric layer easily etched is deposited on the overall surface of a substrate before an isolation region is defined. The first dielectric layer and a sub-collector layer are selectively etched, and then a second dielectric layer etched at a low etch rate is deposited on the overall surface of the substrate. Via holes are formed in the first and second dielectric layers, and then the first dielectric layer is removed using a difference between etch characteristics of the first and second dielectric layers. Accordingly, a reduction in power gain, generated at the interface of a compound semiconductor and a dielectric insulating layer (the second dielectric layer), can be eliminated.
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J. Appl. Phys. 74 (9), Nov. 1, 1993, pp. 5602-5605.
Hideki Fukano, et al., “Surface Currents in InP/InGaAs Heterojunction Bipolar Transistors Produced by Passivatino Film Formation”, Jpn. J. Appl. vol. 32 (1993) pp. L 1788-L 1791, Part 2, No. 12B, Dec. 15, 1993.
Ju Chul-Won
Kim Seong-Il
Lee Jong-Min
Lee Kyung-Ho
Min Byoung-Gue
Blakely & Sokoloff, Taylor & Zafman
Dang Phuc T.
Electronics and Telecommunications Research Institute
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