Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2001-01-29
2002-05-28
Pham, Long (Department: 2823)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S312000, C438S318000, C438S320000
Reexamination Certificate
active
06395608
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bipolar transistor and more particularly to a fully self-aligned heterojunction bipolar transistor (hereinafter, referred to as “HBT”) with an overlay on the mask layout between the emitter and base electrodes.
2. Discussion of Related Art
Generally, HBTs are one of the most important transistors for the microwave frequency band which requires high speed characteristics. Both the emitter and the base of the HBTs are semiconductors, the emitter having a large energy band gap and the base having a small energy band gap. The difference in the energy band gap enables the HBTs to maintain a high current gain and to reduce the base series resistances by heavily doping the base with impurities. As a result, the HBTs have high speed characteristics.
The HBTs are especially used in the field of power amplifiers over 1 GHz because HBTs have a high current density and a good linear property. The HBTs are also being used as a power amplifier in the 900 MHz digital CDMA and the 1.8 GHz PCS telephone, and are expected to be used in later mobile communication services such as IMT2000. A high speed is essential to the HBTs for later use in the field of millimeter waves above 30 GHz such as Local Multipoint Distribution Service (LMDS), Automotive Car Collision Avoidance Radar (ACCAR), Wireless Local Area Network (WLAN), as well as in the field of 1-2 GHz mobile communication.
Basically, a figure-of-merit indicating the high speed characteristic of a transistor is the maximum usable oscillation frequency f
max
. The maximum usable oscillation frequency of HBTs used in the latest mobile communication telephone is typically below 30 GHz. For use of HBTs in frequency environments above 30 GHz, the maximum usable oscillation frequency must be greater than 100 GHz. Recently, HBTs with a maximum usable oscillation frequency above 100 GHz have been produced due to scale-down.
The maximum usable oscillation frequency f
max
of an HBT may be expressed by Equation 1 below:
f
max
=
[
f
t
8
×
π
×
R
b
×
C
bc
]
0.5
[
Equation
⁢
⁢
1
]
where f
t
is the current gain cut-off frequency, R
b
is the base series resistance, and C
bc
is the electrostatic capacitance of a depletion layer between the base and collector. The R
b
value of HBT is low because the base is heavily doped in the HBTs, and is much smaller than the R
b
of a silicon Bipolar Junction Transistor (BJT). The f
t
value is inversely proportional to the transit time of charges (carriers) flowing from the emitter to the collector of a transistor and is dependent upon the vertical epitaxy structure of the HBT, without being affected by the layout of a mask. The f
t
value may be expressed as follows:
1
2
×
π
×
f
t
=
k
×
T
q
×
I
E
×
(
C
jbe
+
C
bc
)
+
τ
b
+
τ
bcscr
[Equation 2]
where k×T/q is the thermal voltage, I
E
is the emitter current, C
jbe
is the electrostatic capacitance of a depletion layer between the emitter and the base, &tgr;
b
is the base transit time, and &tgr;
bcscr
is the running time in a depletion layer between the base and the collector. To increase f
max
, the f
t
value must be enhanced while reducing the R
b
and C
bc
values.
FIGS. 1
a
and
1
b
are plane and cross-sectional views of a MESA type HBT in the related art with a self-aligned emitter and base electrodes. The effects of the transistor structure on the maximum usable oscillation frequency will be described with reference to
FIGS. 1
a
and
1
b.
The maximum usable oscillation frequency f
max
is largely proportional to 1/W
½
because R
b
is proportional to 1/L while C
bc
is proportional to W×L. Thus, the width W
E
of the emitter electrode
14
and the width W of the base-collector PN junction must be reduced to enhance the maximum usable oscillation frequency on the plane structure of a transistor. Accordingly, if f
t
stays constant, the emitter and base electrodes
14
and
15
must be self-aligned such that L
BE
is minimized to lower the base resistance R
b
, and W and W
E
are minimized to decrease the base-collector electrostatic capacitance C
bc
.
The HBT shown in
FIGS. 1
a
and
1
b
uses an air bridge
12
connecting the emitter electrode
14
to the exterior of the transistor. However, the air bridge
12
limits the reduction of the width W
E
of emitter electrode
14
. Particularly, the width W
E
of emitter electrode
14
must be sufficiently greater than the width W
air
of an air bridge such that W
E
>W
air
+&agr;, where &agr;≈2.0 &mgr;m. If the air bridge is misaligned and extends out of the emitter electrode
14
, an electrical short occurs between emitter and base electrodes
14
and
15
. Thus, the HBT structure shown in
FIGS. 1
a
and
1
b
limits the reduction of the widths W
E
and W, and the maximum usable oscillation frequency is difficult to raise.
For the HBT operating in the millimeter wave band greater than 30 GHz, the desirable width of emitter electrode is below 1 &mgr;m and a different HBT structure is required. Generally, the second HBT structure, shown in
FIG. 2
, is made using a method of reducing the widths W
E
and W through a metal wiring process utilizing planarization of polyimide
30
. This process allows a fabrication of a HBT used in the millimeter wave band with small widths W
E
and W, because the polyimide
30
electrically isolates the emitter and the base electrodes
14
and
15
even if the emitter electrode
14
is formed with a metal having a wiring width greater than W
E
. However, controlling the fabrication process for this structure is difficult.
The fabrication process of HBTs shown in
FIGS. 1 and 1
b
and
FIG. 2
will next be described.
FIGS. 3
a
-
3
h
are cross-sectional views illustrating a fabricating process for the HBT shown in
FIGS. 1
a
and
1
b.
FIGS. 4
a
-
4
e
are cross-sectional views illustrating a fabricating process for the HBT shown in FIG.
2
.
As shown in
FIG. 3
a,
a sub-collector layer
21
, a collector layer
20
, a base layer
16
, an emitter layer
19
and an ohmic cap layer
18
are sequentially formed on a semiconductor substrate
22
by means of epitaxial growth. Next, an emitter electrode
14
consisting of a metal is formed in a defined profile on the resulting structure. As shown in
FIG. 3
b,
the emitter electrode
14
is used as a mask in etching the structure so as to expose the base layer
16
. The etching technique utilized is typically reactive ion etching or wet etching. As a result of the etching process, an undercut profile as shown in part B of
FIG. 3
b
is formed.
After forming a defined photoresist pattern at a portion including the emitter electrode
14
, base metal layers
15
and
15
′ are deposited on the entire surface and lifted off to form a base electrode
15
, as shown in
FIG. 3
c.
The base electrode
15
is self-aligned around the emitter electrode
14
due to the undercut B formed by the etching step. This lowers the parasitic resistance R
b
of the base. The thickness t of the base electrode
15
must be smaller than the sum (indicated by “s” of
FIG. 3
b
) of the emitter layer
19
thickness and the ohmic cap layer
18
thickness of the emitter.
As shown in
FIG. 3
d,
the base layer
16
and the collector layer
20
are etched to define a base-collector PN junction C. Subsequently, a collector electrode
17
is formed in a defined profile on the sub-collector layer
21
, as shown in
FIG. 3
e.
Following the formation of the collector electrode
17
, ions are injected into the sub-collector layer
21
to form an insulating layer
10
, shown in
FIG. 3
f.
The injected ions are boron. A pad
11
is formed with a wiring metal, as shown in
FIG. 3
g
and an air bridge
12
is formed to connect the emitter electrode
14
with the external pad
11
of the transistor, which completes the HBT, as shown in
FIG. 3
h.
Referring to
FIG. 4
a,
the procedures as described above in reference to
FIGS. 3
a
-
3
g
are repeated in the fabrication of th
Kim Hyung Wook
Lim Tae Yun
Shin Jin Ho
Fleshner & Kim LLP.
LG Electronics Inc.
Pham Long
LandOfFree
Heterojunction bipolar transistor and its fabrication method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Heterojunction bipolar transistor and its fabrication method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Heterojunction bipolar transistor and its fabrication method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2883626