Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch
Patent
1991-01-10
1993-01-05
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
With lattice constant mismatch
257198, 257592, H01L 29161, H01L 2972
Patent
active
051775832
ABSTRACT:
In a first heterojunction bipolar transistor (HBT) of the present invention, base layers and collector layers are respectively divided into a plurality of layers and one of the base layers provided closer to the collector layer reiogn is set lower in impurity concentration than the other thereof provided closer to an emitter layer, thus solving a problem that thermal histories during epitaxial growth or during processes cause a set impurity distribution to be destroyed due to diffusion and thus a heterojunction is shifted from a p-n junction. Since minority carriers in the base can smoothly flow toward the collector, there can be realized an excellent HBT having a very high current gain and a very high cut-off frequency. In a second HBT of the invention, a base region comprises a first base layer of a low concentration having the same energy band gap as an emitter region and to be changed to a complete depletion layer in a thermally balanced state and a graded second base layer of a high concentration, and the first and second base layers form a heterojunction, thereby realizing an excellent HBT having a high speed performance which can exhibit a sufficient grading effect while preventing deterioration of an emitter-base voltage withstanding characteristic.
REFERENCES:
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Endo Takahiko
Katoh Riichi
Carroll J.
Kabushiki Kaisha Toshiba
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