Hetero junction field effect transistor and method of...

Details Hetero junction field effect transistor and method of... Hetero junction field effect transistor and method of...

2011-07-05

2011-07-05

Bryant, Kiesha R (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C257S020000, C257SE29246

Reexamination Certificate

active

07973338

ABSTRACT:
There is provided a hetero junction field effect transistor including: a first layer of a nitride based, group III-V compound semiconductor; a second layer of a nitride based, group III-V compound semiconductor containing a rare earth element, overlying the first layer; a pair of third layers of a nitride based, group III-V compound semiconductor, overlying the second layer, the third layers being spaced from each other; a gate electrode disposed between the third layers at least a region of the second layer; and a source electrode overlying one of the third layers and a drain electrode overlying an other of the third layers. A method of fabricating the hetero junction field effect transistor is also provided.

REFERENCES:
patent: 6656823 (2003-12-01), Lee et al.
patent: 2000-76024 (2000-03-01), None
patent: 2000-243947 (2000-09-01), None
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patent: 2002-76024 (2002-03-01), None
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patent: 2003-445900 (2003-02-01), None
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Machine translation of JP2002-076024.
Ken Nakata et al. “Normally Off AlGaN/GaN HEMT with Recessed Gate for High Power Applications,” IEICE Technical Report, Oct. 2005, vol. 105, No. 325, pp. 51-56.

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