Hermetic packaging and method of manufacture and use therefore

Details Hermetic packaging and method of manufacture and use therefore Hermetic packaging and method of manufacture and use therefore

2008-02-11

2009-08-25

Cao, Phat X (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Physical deformation

C257S419000, C257S420000

Reexamination Certificate

active

07579663

ABSTRACT:
A system and method for manufacturing micro cavity packaging enclosure at the wafer level using MEMS (MicroElectroMechanical Systems) process, wherein micro cavities are formed from epoxy-bonded single-crystalline silicon wafer as its cap, epoxy and deposited metal or insulator as at least part of its sidewall, on substrate wafers.

REFERENCES:
patent: 5682053 (1997-10-01), Wiszniewski
patent: 6525396 (2003-02-01), Melendez et al.

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