Electric heating – Inductive heating – Specific heating application
Reexamination Certificate
1997-10-29
2001-01-23
Leung, Philip H. (Department: 3742)
Electric heating
Inductive heating
Specific heating application
C219S647000, C219S667000, C219S444100, C118S725000, C118S728000, C392S416000
Reexamination Certificate
active
06177661
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a stage for holding a wafer during semiconductor device fabrication and, more particularly, to a stage which is heated in order to prevent particles in the air from accumulating on the wafer.
2. Discussion of Related Art
In general, semiconductor device fabrication involves multiple steps, including: a diffusion step for forming a thin film on the surface of a wafer; a heat treatment step; a photographic process for forming a previously set pattern on the wafer surface; an etching process for realizing the pattern; an ion implanting process for producing an intended electric characteristic in the film; and a thin film process for making the film thinner and more uniform. After these processes, the wafer is examined in a testing/measuring process to determine whether the desired effect has been achieved.
Testing/measuring facilities are designed specifically to test each wafer one at a time after each wafer is laid on a stage. The wafer is transported and tested while on this stage.
An example of a stage used in the testing/measuring processes is illustrated in the loadlock chamber of FIG.
1
. The loadlock chamber serves as an airlock for a test chamber. The loadlock chamber has a wafer holder arm
4
and a stage
5
which is placed under the holder arm
4
in the load chamber
1
. The loadlock chamber
1
further has an inner gate
2
and an outer gate
3
. In the case where the loadlock chamber is used with a vacuum test chamber, the outer gate
3
is opened while the inner gate
2
is closed in order to protect the vacuum test chamber from the outside air. In that state, a wafer (not shown) is inserted and laid on the stage
5
. Then, the outer gate
3
is closed and air from inside the loadlock chamber is removed by a suctioning process until its pressure matches the predetermined low pressure of the vacuum test chamber. Then the inner gate
2
is opened so that the wafer on the stage
5
of the load chamber can be moved to the vacuum test chamber.
However, even though the loadlock chamber is used in a clean room, each wafer is exposed to the air before being inserted into the test chamber. Therefore, particles remaining in the fresh air in the clean room or falling from the facilities or introduced by a worker, may accumulate or adhere onto the wafer. This contaminates the wafer
6
, causes the product to be defective, and thus decreases the yield of the semiconductor device fabricating process.
SUMMARY OF THE INVENTION
The present invention is directed to a wafer holding stage used during a semiconductor device fabricating process that substantially overcomes one or more of the problems due to limitations and disadvantages of the related art.
A wafer holding stage for use in fabricating semiconductor devices comprises a stage having an upper surface for holding a wafer, and a heating element disposed inside the stage for raising temperatures of the upper surface to a holding temperature above an ambient temperature.
In another aspect a wafer holding stage is provided that further comprises a low temperature particle collector, having a surface maintained at a collecting temperature below ambient, spaced apart a small distance from the stage.
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patent: 5038711 (1991-08-01), Dan et al.
patent: 5183402 (1993-02-01), Cooke et al.
patent: 5242501 (1993-09-01), McDiarmid
patent: 5462603 (1995-10-01), Murakami
patent: 5472749 (1995-12-01), Dravid et al.
patent: 5478401 (1995-12-01), Tsunekawa et al.
patent: 5680502 (1997-10-01), Kim
patent: 5891548 (1999-04-01), Graiver
Kim Tae-hyup
Lee Joung-Sun
Jones Volentine, LLC
Leung Philip H.
Samsung Electronics Co,. Ltd.
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