Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
1998-12-21
2001-04-17
Lee, Thomas (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C711S154000
Reexamination Certificate
active
06219722
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a head IC and a recording apparatus for recording and reproducing information by switching a plurality of heads arranged in correspondence to a plurality of medium surfaces. More particularly, the invention relates to a head IC and a recording apparatus having an operating function as a servo writer for recording servo information onto a medium surface.
In recent years, an MR head is used as a read head in association with an increase in capacity of a magnetic disk apparatus. In case of using the MR head, there is a phenomenon called a thermal asperity (hereinbelow, called “TA”) such that a magnetic disk medium and the head come into contact with each other, a temperature of an MR device rises, and a DC component in a reproduction output of the MR head largely fluctuates. There is a problem such that reproduction outputs of the heads of tens of bytes become abnormal and original data cannot be reconstructed even if an ECC or the like is used. As countermeasures for the TA, a method of raising a cut-off frequency of a head IC or a read channel circuit when the TA occurs and promoting a convergence of a fluctuation in the DC components, a method of compensating by oppositely adding a DC fluctuation amount, a method of fixing a gain of an AGC amplifier when the TA occurs, a method of fixing a frequency of a PLL in the read channel circuit, a method of specifying an error occurrence position by the TA and enhancing an ECC capability, and the like are considered. Among those TA countermeasures, in the method of changing the cut-off frequency or the method of cancelling the DC components, if such a method is executed in the head IC rather than in the read channel circuit, it is more advantageous with respect to a point of assurance of a dynamic range of an input amplifier of the read channel circuit. Therefore, functions of changing the cut-off frequency and cancelling the DC components are provided in the head IC.
Hitherto, as control signals for the head IC, only a plurality of head selection signals, a chip selection signal, an R/W signal for switching operating modes of reading and writing, and the like are necessary. In case of providing the TA countermeasure function in the head IC in order to support the TA countermeasures, however, the number of control signal lines increases, the number of signal lines connecting a control board for controlling a hard disk and a head IC circuit mounted on an FPC on a head actuator side increases, and the number of pins of connectors also increases, so that the costs increase. There has been put into practical use a head IC constructed in a manner such that control registers of the number corresponding to the kinds of controls are provided for the head IC, a register address and control data are transferred through a serial interface, a head selection, a chip selection, a selection of the operating modes for reading and writing can be controlled, and further, a function control of the countermeasures against the TA can be performed on the basis of the storage contents in the control register.
In a magnetic disk apparatus using the head IC which can control the head selection, chip selection, selection of the reading and writing operating modes, and the like by using the serial interface, however, when servo information is written into a magnetic disk medium in an apparatus manufacturing step, there are problems such that it takes time for switching the head by the serial interface and the productivity remarkably deteriorates. Usually, a servo writing to the magnetic disk medium is performed in a clean room by a dedicated writing facility. In order to reduce the costs by shortening a servo writing time and assuring a writing capability, it is requested to reduce the number of writing facilities which are installed. Further, according to the servo writing, servo information is not written on a track unit basis by each head corresponding to the medium surface. A desired head is selected by designating a certain head address and information of one servo frame is written onto the medium surface. After that, the head addresses are sequentially switched for a time interval until the next servo frame, servo information is written while sequentially switching the heads, and servo information of all of the heads is written in one servo frame interval. By a high-speed servo writing such that all of the heads are switched at every servo frame interval and the servo information is sequentially written onto the different medium surfaces while deviating the writing positions, the servo writing time is fairly reduced and the facility capability is enhanced, thereby enabling the costs to be reduced.
With respect to a case of setting the number of heads to four, a case of sequentially designating the head addresses for the head ICs by the serial interface, switching the heads at an interval of one servo frame, and sequentially recording the servo information onto the different medium surfaces will now be considered. First, in case of serially transferring total 16 bits comprising 8 bits of an address and 8 bits of data, when it is assumed that a clock frequency of the serial interface is equal to 20 MHz, a switching time Th that is required for switching the head addresses is at least as follows.
Th
=
16
bits
×
1
/
(
20
MHz
×
10
6
)
=
800
[
nsec
]
The switching time Th is a time which can be sufficiently ignored in case of executing the ordinary reading or writing operation. In the high-speed servo writing for switching all of the heads at one servo frame interval and sequentially writing the servo information onto the different medium surfaces while deviating the writing positions, however, the switching time Th cannot be ignored. In the high-speed servo writing, an example where a servo sampling period is equal to 40 &mgr;sec (25 kHz) and a servo frame length is equal to 9.5 &mgr;sec will be considered. Since an allocating time per head is equal to (40 &mgr;sec/4 heads)=10 &mgr;sec and the servo frame length is equal to 9.5 &mgr;sec, only a time of 0.5 &mgr;sec (500 nsec) is permitted for the head switching. On the contrary, in the head selection using the serial interface, a switching time of 800 nsec is necessary only for a serial transfer and there is, consequently, a problem such that the servo information of all of the heads cannot be written within one servo frame.
SUMMARY OF THE INVENTION
According to the invention, there are provided a head IC and a recording apparatus which can perform a high-speed head switching in a servo writing mode without being restricted by a serial transfer time.
According to the invention, there is provided a head IC for recording and reproducing information by switching a plurality of heads arranged in correspondence to a plurality of medium surfaces, comprising: a serial interface unit for receiving a register address and control data which are serially transferred from the outside; a head address control register for storing the control data which is designated by the head address received by the serial interface unit and received and for outputting a head selection signal based on the control data; and an automatic head switching control unit for automatically switching the contents of the head address control register synchronously with a write gate signal (WRGT signal) from the outside which instructs a writing operation and sequentially outputting the head selection signals for the plurality of heads when an automatic head switching mode is set from the outside. In the head IC of the invention as mentioned above, when the automatic head switching mode is set and the writing operation is executed by the write gate signal, the head is automatically switched by using the end of execution of the writing operation serving as a timing when the write gate signal rises as a trigger. Since the head can be switched without accompanying data transfer by the serial interface, th
Arent Fox Kintner & Plotkin & Kahn, PLLC
Fujitsu Limited
Lee Thomas
Patel Nitin
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