Hashing and serial decoding techniques

Details Hashing and serial decoding techniques Hashing and serial decoding techniques

2008-08-27

2010-10-19

Song, Jasmine (Department: 2189)

Electrical computers and digital processing systems: memory

Address formation

Incrementing, decrementing, or shifting circuitry

C711S216000, C711S217000, C711S218000

Reexamination Certificate

active

07818538

ABSTRACT:
A serial decoding technique may employ one or more circular shift register strings in which an input to an element of a shift register string may be gated by either an address input or the inverse of the address input. An output word line of the decoder may be driven by a respective shift register stage in the case of a single shift register string, or by a logical combination of shift register stages from respective shift register strings in the case of multiple shift register strings.

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patent: 5452255 (1995-09-01), Mine et al.
patent: 6530051 (2003-03-01), Weinfurtner
patent: 6639867 (2003-10-01), Shim
patent: 6785278 (2004-08-01), Calvignac et al.
patent: 6804768 (2004-10-01), Moyer
patent: 6907439 (2005-06-01), Wicker

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