Hardware-level mitigation and DPA countermeasures for...

Electrical computers and digital processing systems: support – Multiple computer communication using cryptography – Particular communication authentication technique

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C713S171000, C713S152000, C713S152000

Reexamination Certificate

active

06654884

ABSTRACT:

FIELD OF THE INVENTION
The method and apparatus of the present invention relate generally to cryptographic systems and, more specifically, to cryptographic tokens that must maintain the security of secret information in hostile environments.
BACKGROUND OF THE INVENTION
Many cryptographic devices must maintain and manipulate secret parameters in hostile environments without revealing their values. Examples of such devices include, without limitation, secure identity tokens, smartcards, electronic purses, television descrambling systems, cellular telephone security systems, etc. Uses of such secret parameters include, without limitation, performing digital signatures as part of a challenge-response protocol, authenticating commands or requests, authenticating executable code updates, encrypting or decrypting arbitrary data (as in a secure key storage/cryptographic acceleration unit), etc. For example, a smartcard used in a stored value system may digitally sign or compute the Message Authentication Code (MAC) of parameters such as the smartcard's serial number, balance, expiration date, transaction counter, currency, and transaction amount as part of a value transfer. Compromise of the secret key used to compute the signature or MAC may allow an attacker to perform fraudulent transactions by forging MACs or signatures.
The power consumed by a microprocessor over a given clock cycle is generally a (usually complicated) function of the processor's state and state changes. In the background art, binary ones and zeros are often represented as high or low voltage levels. The amount of current that a component (such as a resistor or transistor) draws is a function of the voltage(s) applied across it. (The specific relationship between voltage and current depends on the component. For example, resistors tend to be fairly linear, while transistors can be quite nonlinear.) The total amount of power consumed by a device is a combination of the contributions from many individual circuit elements, each responding to its local voltage environment. A difference in a single bit in the input to a computation, for example, causes a register to hold a different value (that is, voltage level), and can influence the inputs (and outputs) of many gates through which the computation path flows. Therefore, the combination of the contributions from many individual circuit elements can lead to a difference between the amount of power being consumed when the bit is one and the amount consumed when the bit is zero.
Additionally, state changes are a major factor affecting the power consumption of a device performing a computation. As the value of a bit changes, transistor switches associated with that bit change state. There is an increase in the amount of power consumed when the system is in transition. The relative magnitude of variations in power consumption will depend, in part, on the family of logic used. For example, with CMOS logic, changes in the system state have a pronounced effect on power consumption.
The amount of electromagnetic radiation produced by a computational device is a function of the electrical charge movements within it. The amplitude, frequency, and direction of charge flows within a processor are determined by the layout and impedance of the pathways through which charge flows in the device. They are also functions of the device's state and alterations between states, and vary with the parameters of a computation.
Some devices in the background art, such as those shielded to U.S. Government Tempest specifications, use techniques to hinder external monitoring. Generally, these methods focus on isolating devices from potential eavesdroppers. Such techniques include using large capacitors and other power regulation systems to minimize variations in power consumption, enclosing devices in well-shielded cases to prevent electromagnetic radiation, buffering input and output to prevent signals from leaking out on I/O lines, and surrounding vulnerable devices with epoxy to prevent invasive attacks. Sometimes such techniques for hindering monitoring are combined with active tamper detection and resistance measures (such as voltage, pressure or temperature sensors, fine wires or membranes, etc.) which may cause the device to shut down or self-destruct when external monitoring is suspected.
However, these techniques are ill suited for use in smartcards, secure microprocessors, and other small devices that cannot easily be physically isolated from their environments. While they can be useful in detecting active and invasive attacks against a system, tamper detection techniques are limited in that they do not prevent the exploitation of information that leaks during normal operation of a system. In smartcards and other small, low-cost, poorly-shielded devices that must resist monitoring attacks and other kinds of tampering, both active and passive countermeasures of the background art are often inapplicable or insufficient due to reliance on external power sources, physical impracticality of shielding, cost, and other constraints.
Thus, methods for reducing leakage that are practical to implement in small, physically constrained, low-cost cryptographic tokens (devices) such as smartcards, are needed.
SUMMARY OF THE INVENTION
The present invention introduces techniques for minimizing or effectively eliminating information leaks from cryptosystems that result from power consumption fluctuations, electromagnetic radiation, and other externally measurable attributes. Methods of the invention to reduce leakage include transforming the underlying transistor-and-wire level representation of bits and transforming computational processes and circuits. The transformations can make attributes associated with common sources of information leakage from cryptographic devices invariant for all possible valid inputs to a computation. By reducing or eliminating leakage, security against external monitoring attacks is greatly improved.
The present invention transforms the basic representation of data. A constant Hamming weight data representation replaces conventional bit representations commonly employed in the background art. The present invention also transforms the algorithms, working with the balanced Hamming weight representation, to perform calculations while holding the number of internal transitions invariant at each step. For example, exemplary fixed transition rate algorithms for computing NAND, NOT, NOR, and XOR operations are presented which work with data in this representation. The present invention also introduces a state-maintenance step which, when executed between subsequent operations, assures that the number of state transitions between operations does not reveal information about the parameters of computation. These techniques have direct analogs in hardware; exemplary methods for implementing hardware gates with balanced Hamming weight representations and state transitions are presented.
Leakless gate embodiments of the present invention are also presented. The term “leakless” is used to describe methods and devices that provide either no leaked information, or significantly reduced amounts of leaked information, to attackers; some embodiments of “leakless” systems may be imperfect in that they leak some information. Leakless functions can be built out of such gates to provide improved security in cryptographic applications. For example, these gates may be used to implement functions, such as but not limited to cryptographic algorithms, in devices of all kinds, including, without limitation, cryptographic coprocessors and general-purpose microprocessors.
The present invention can be embodied in a variety of forms, including, without limitation, software, firmware, and microcode. Alternatively, the leak minimizing design principles of the invention can be used to implement cryptographic functions directly in hardware, e.g., by using constant Hamming weight data representations and tailoring implementations of cryptographic algorithms such that the number of transitions at

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Hardware-level mitigation and DPA countermeasures for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Hardware-level mitigation and DPA countermeasures for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hardware-level mitigation and DPA countermeasures for... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3174803

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.