Hardware hashing of an input of a content addressable memory...

Details Hardware hashing of an input of a content addressable memory... Hardware hashing of an input of a content addressable memory...

2006-11-14

2006-11-14

Kim, Hong Chong (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S216000, C713S153000

Reexamination Certificate

active

07136960

ABSTRACT:
An integrated circuit chip is provided having a port for receiving a character string. A hardware hashing circuit on the integrated circuit chip is configured to perform a hashing function on the character string, thereby creating a hashed output value. A binary content addressable memory (CAM) array on the integrated circuit chip is coupled to receive the hashed output value. The binary CAM array provides an index value in response to the hashed output value if the hashed output value matches an entry of the binary CAM array. In a particular embodiment, the hardware hashing circuit can be configured to process character strings having different lengths (greater than the width of the binary CAM array) in response to one or more configuration bits. The hardware hashing circuit can include, an input register, Data Encryption Standard (DES) circuitry and exclusive OR circuitry.

REFERENCES:
patent: 4056845 (1977-11-01), Churchill, Jr.
patent: 5339076 (1994-08-01), Jiang
patent: 5339398 (1994-08-01), Shah et al.
patent: 5822321 (1998-10-01), Petersen et al.
patent: 5838264 (1998-11-01), Cooper
patent: 5920900 (1999-07-01), Poole et al.
patent: 5930359 (1999-07-01), Kempke et al.
patent: 6226710 (2001-05-01), Melchior
patent: 6560337 (2003-05-01), Peyravian et al.
patent: 6622168 (2003-09-01), Datta
patent: 6631419 (2003-10-01), Greene
patent: 6697276 (2004-02-01), Pereira et al.
patent: 6708250 (2004-03-01), Gillingham
patent: 6715029 (2004-03-01), Trainin et al.
patent: 6748484 (2004-06-01), Henderson et al.
patent: 6754800 (2004-06-01), Wong et al.
patent: 6763426 (2004-07-01), James et al.
patent: 6889225 (2005-05-01), Cheng et al.
patent: 6892237 (2005-05-01), Gai et al.
patent: 2002/0094084 (2002-07-01), Wasilewski et al.
patent: 2002/0161969 (2002-10-01), Nataraj et al.
patent: 2002/0178341 (2002-11-01), Frank
patent: 2003/0012198 (2003-01-01), Kaganoi et al.
patent: 2003/0037055 (2003-02-01), Cheng et al.
patent: 2003/0188089 (2003-10-01), Perloff
“IPv4,” http://en.wikipedia.org/wiki/IPv4, pp. 104.
“IPv6,” http://en.wikipedia.org/wiki/IPv6, pp. 1-9.
Fielding et al., “Hypertext Transfer Protocol,” published 1999, p. 25.
IBM Tech. Disc. Bulletin, “Improved Caching on Net Commerce Pages,” published May 2001, Issue 445, p. 863.

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