Hardware-based encryption/decryption employing dual ported...

Details Hardware-based encryption/decryption employing dual ported... Hardware-based encryption/decryption employing dual ported...

2005-11-30

2009-08-11

Nguyen, Than (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S141000, C380S042000

Reexamination Certificate

active

07574571

ABSTRACT:
A system for the encryption and decryption of data employing dual ported RAM to accelerate data processing operations during the computation of the encryption and decryption algorithm. The system includes logic to track data changes in the dual ported memory for fast table initialization; a means to accelerate operations by performing read/write operations in different iterations of the algorithm to separate ports on the dual ported RAM in the same clock cycle; and a means to resolve data manipulation conflicts between out of order read/write operations so that the system correctly computes the desired algorithm.

REFERENCES:
patent: 4890223 (1989-12-01), Cruess et al.
patent: 6460054 (2002-10-01), Grummon
patent: 6684305 (2004-01-01), Deneau

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